34 lines
1.1 KiB
Plaintext
34 lines
1.1 KiB
Plaintext
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# RUN: llc -mtriple=aarch64-arm-none-eabi -o - %s \
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# RUN: -run-pass simple-register-coalescing | FileCheck %s
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# In this test case, the 32-bit copy implements a 32 to 64 bit zero extension
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# and relies on the upper 32 bits being zeroed.
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# Coalescing to the result of the 64-bit load meant overwriting
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# the upper 32 bits incorrectly when the loaded byte was negative.
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--- |
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@c = local_unnamed_addr global i8 -1, align 4
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define i64 @bug_e(i32 %i32) local_unnamed_addr {
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ret i64 0
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}
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...
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---
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name: bug_e
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0
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%1:gpr32 = COPY $w0
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%2:gpr64common = ADRP target-flags(aarch64-page) @c
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%3:gpr64 = LDRSBXui %2, target-flags(aarch64-pageoff, aarch64-nc) @c :: (dereferenceable load 1 from @c, align 4)
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%0:gpr32 = COPY %3.sub_32
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; CHECK: {{.*}}.sub_32:gpr64 = COPY {{.*}}.sub_32
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STRBBui %1, %2, target-flags(aarch64-pageoff, aarch64-nc) @c :: (store 1 into @c, align 4)
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%8:gpr64all = SUBREG_TO_REG 0, %0, %subreg.sub_32
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$x0 = COPY %8
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; CHECK: $x0 = COPY
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RET_ReallyLR implicit $x0
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...
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