56 lines
1.5 KiB
LLVM
56 lines
1.5 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=armv6-eabi %s -o - | FileCheck %s
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; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+dsp %s -o - | FileCheck %s
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define arm_aapcs_vfpcc i32 @ssat_lsl(i32 %num){
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; CHECK-LABEL: ssat_lsl
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: ssat r0, #8, r0, lsl #7
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; CHECK-NEXT: bx lr
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entry:
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%shl = shl i32 %num, 7
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%0 = tail call i32 @llvm.arm.ssat(i32 %shl, i32 8)
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ret i32 %0
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}
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define arm_aapcs_vfpcc i32 @ssat_asr(i32 %num){
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; CHECK-LABEL: ssat_asr
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: ssat r0, #8, r0, asr #7
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; CHECK-NEXT: bx lr
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entry:
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%shr = ashr i32 %num, 7
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%0 = tail call i32 @llvm.arm.ssat(i32 %shr, i32 8)
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ret i32 %0
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}
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define arm_aapcs_vfpcc i32 @ssat_lsl2(i32 %num){
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; CHECK-LABEL: ssat_lsl2:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: ssat r0, #16, r0, lsl #15
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; CHECK-NEXT: bx lr
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entry:
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%shl = shl nsw i32 %num, 15
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%0 = icmp sgt i32 %shl, -32768
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%1 = select i1 %0, i32 %shl, i32 -32768
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%2 = icmp slt i32 %1, 32767
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%3 = select i1 %2, i32 %1, i32 32767
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ret i32 %3
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}
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define arm_aapcs_vfpcc i32 @ssat_asr2(i32 %num){
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; CHECK-LABEL: ssat_asr2:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: ssat r0, #16, r0, asr #15
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; CHECK-NEXT: bx lr
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entry:
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%shr = ashr i32 %num, 15
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%0 = icmp sgt i32 %shr, -32768
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%1 = select i1 %0, i32 %shr, i32 -32768
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%2 = icmp slt i32 %1, 32767
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%3 = select i1 %2, i32 %1, i32 32767
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ret i32 %3
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}
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declare i32 @llvm.arm.ssat(i32, i32)
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