55 lines
1.8 KiB
LLVM
55 lines
1.8 KiB
LLVM
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; RUN: llc -march=mipsel -mcpu=mips32 < %s | FileCheck %s -check-prefix=CHECK-MIPS32
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; RUN: llc -march=mips64el -mcpu=mips64 -relocation-model=pic < %s | \
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; RUN: FileCheck %s -check-prefix=CHECK-MIPS64
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; RUN: llc -march=mipsel -mcpu=mips64 -target-abi n32 < %s | \
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; RUN: FileCheck %s -check-prefix=CHECK-MIPSN32
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; Test that the expansion of ADJCALLSTACKDOWN and ADJCALLSTACKUP generate
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; (d)subu and (d)addu rather than just (d)addu. The (d)subu sequences are
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; generally shorter as the constant that has to be materialized is smaller.
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define i32 @main() {
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entry:
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%z = alloca [1048576 x i8], align 1
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%arraydecay = getelementptr inbounds [1048576 x i8], [1048576 x i8]* %z, i32 0, i32 0
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%call = call i32 @foo(i8* %arraydecay)
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ret i32 0
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; CHECK-LABEL: main
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; CHECK-MIPS32: lui $[[R0:[0-9]+]], 16
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; CHECK-MIPS32: addiu $[[R0]], $[[R0]], 24
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; CHECK-MIPS32: subu $sp, $sp, $[[R0]]
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; CHECK-MIPS32: lui $[[R1:[0-9]+]], 16
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; CHECK-MIPS32: addiu $[[R1]], $[[R1]], 24
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; CHECK-MIPS32: addu $sp, $sp, $[[R1]]
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; CHECK-MIPS64: lui $[[R0:[0-9]+]], 1
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; CHECK-MIPS64: daddiu $[[R0]], $[[R0]], 32
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; CHECK-MIPS64: dsubu $sp, $sp, $[[R0]]
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; FIXME:
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; These are here to match other lui's used in address computations. We need to
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; investigate why address computations are not CSE'd. Or implement it.
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; CHECK-MIPS64: lui
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; CHECK-MIPS64: lui
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; CHECK-MIPS64: lui
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; CHECK-MIPS64: lui
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; CHECK-MIPS64: lui $[[R1:[0-9]+]], 16
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; CHECK-MIPS64: daddiu $[[R1]], $[[R1]], 32
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; CHECK-MIPS64: daddu $sp, $sp, $[[R1]]
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; CHECK-MIPSN32: lui $[[R0:[0-9]+]], 16
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; CHECK-MIPSN32: addiu $[[R0]], $[[R0]], 16
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; CHECK-MIPSN32: subu $sp, $sp, $[[R0]]
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; CHECK-MIPSN32: lui $[[R1:[0-9]+]], 16
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; CHECK-MIPSN32: addiu $[[R1]], $[[R1]], 16
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; CHECK-MIPSN32: addu $sp, $sp, $[[R1]]
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}
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declare i32 @foo(i8*)
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