llvm-for-llvmta/test/CodeGen/Mips/instverify/dinsu-pos-size.mir

50 lines
1.2 KiB
Plaintext
Raw Normal View History

2022-04-25 10:02:23 +02:00
# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position + Size is out of range!
# Check that the machine verifier checks the pos + size is in the range 33..64
---
name: dinsu
alignment: 8
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
tracksRegLiveness: true
registers:
- { id: 0, class: gpr64, preferred-register: '' }
- { id: 1, class: gpr64, preferred-register: '' }
liveins:
- { reg: '$a0_64', virtual-reg: '%0' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 4294967295
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
savePoint: ''
restorePoint: ''
fixedStack:
stack:
constants:
body: |
bb.0.entry:
liveins: $a0_64
%0 = COPY $a0_64
%1 = DINSU %0, 50, 20
$v0_64 = COPY %1
RetRA implicit $v0_64
...