llvm-for-llvmta/test/CodeGen/SystemZ/fp-strict-sqrt-01.ll

104 lines
3.3 KiB
LLVM
Raw Normal View History

2022-04-25 10:02:23 +02:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
;
; Test strict 32-bit square root.
;
declare float @llvm.experimental.constrained.sqrt.f32(float, metadata, metadata)
; Check register square root.
define float @f1(float %val) #0 {
; CHECK-LABEL: f1:
; CHECK: # %bb.0:
; CHECK-NEXT: sqebr %f0, %f0
; CHECK-NEXT: br %r14
%res = call float @llvm.experimental.constrained.sqrt.f32(
float %val,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
ret float %res
}
; Check the low end of the SQEB range.
define float @f2(float *%ptr) #0 {
; CHECK-LABEL: f2:
; CHECK: # %bb.0:
; CHECK-NEXT: sqeb %f0, 0(%r2)
; CHECK-NEXT: br %r14
%val = load float, float *%ptr
%res = call float @llvm.experimental.constrained.sqrt.f32(
float %val,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
ret float %res
}
; Check the high end of the aligned SQEB range.
define float @f3(float *%base) #0 {
; CHECK-LABEL: f3:
; CHECK: # %bb.0:
; CHECK-NEXT: sqeb %f0, 4092(%r2)
; CHECK-NEXT: br %r14
%ptr = getelementptr float, float *%base, i64 1023
%val = load float, float *%ptr
%res = call float @llvm.experimental.constrained.sqrt.f32(
float %val,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
ret float %res
}
; Check the next word up, which needs separate address logic.
; Other sequences besides this one would be OK.
define float @f4(float *%base) #0 {
; CHECK-LABEL: f4:
; CHECK: # %bb.0:
; CHECK-NEXT: aghi %r2, 4096
; CHECK-NEXT: sqeb %f0, 0(%r2)
; CHECK-NEXT: br %r14
%ptr = getelementptr float, float *%base, i64 1024
%val = load float, float *%ptr
%res = call float @llvm.experimental.constrained.sqrt.f32(
float %val,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
ret float %res
}
; Check negative displacements, which also need separate address logic.
define float @f5(float *%base) #0 {
; CHECK-LABEL: f5:
; CHECK: # %bb.0:
; CHECK-NEXT: aghi %r2, -4
; CHECK-NEXT: sqeb %f0, 0(%r2)
; CHECK-NEXT: br %r14
%ptr = getelementptr float, float *%base, i64 -1
%val = load float, float *%ptr
%res = call float @llvm.experimental.constrained.sqrt.f32(
float %val,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
ret float %res
}
; Check that SQEB allows indices.
define float @f6(float *%base, i64 %index) #0 {
; CHECK-LABEL: f6:
; CHECK: # %bb.0:
; CHECK-NEXT: sllg %r1, %r3, 2
; CHECK-NEXT: sqeb %f0, 400(%r1,%r2)
; CHECK-NEXT: br %r14
%ptr1 = getelementptr float, float *%base, i64 %index
%ptr2 = getelementptr float, float *%ptr1, i64 100
%val = load float, float *%ptr2
%res = call float @llvm.experimental.constrained.sqrt.f32(
float %val,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
ret float %res
}
attributes #0 = { strictfp }