327 lines
11 KiB
LLVM
327 lines
11 KiB
LLVM
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; RUN: llc < %s -O0 -asm-verbose=false -verify-machineinstrs -disable-block-placement -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
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; Test irreducible CFG handling.
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target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
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target triple = "wasm32-unknown-unknown"
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; A simple loop with two entries.
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; CHECK-LABEL: test0:
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; CHECK: f64.load
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; CHECK: i32.const $[[REG:[^,]+]]=
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; CHECK: br_table $[[REG]],
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define void @test0(double* %arg, i32 %arg1, i32 %arg2, i32 %arg3) {
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bb:
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%tmp = icmp eq i32 %arg2, 0
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br i1 %tmp, label %bb6, label %bb3
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bb3: ; preds = %bb
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%tmp4 = getelementptr double, double* %arg, i32 %arg3
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%tmp5 = load double, double* %tmp4, align 4
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br label %bb13
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bb6: ; preds = %bb13, %bb
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%tmp7 = phi i32 [ %tmp18, %bb13 ], [ 0, %bb ]
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%tmp8 = icmp slt i32 %tmp7, %arg1
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br i1 %tmp8, label %bb9, label %bb19
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bb9: ; preds = %bb6
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%tmp10 = getelementptr double, double* %arg, i32 %tmp7
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%tmp11 = load double, double* %tmp10, align 4
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%tmp12 = fmul double %tmp11, 2.300000e+00
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store double %tmp12, double* %tmp10, align 4
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br label %bb13
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bb13: ; preds = %bb9, %bb3
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%tmp14 = phi double [ %tmp5, %bb3 ], [ %tmp12, %bb9 ]
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%tmp15 = phi i32 [ undef, %bb3 ], [ %tmp7, %bb9 ]
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%tmp16 = getelementptr double, double* %arg, i32 %tmp15
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%tmp17 = fadd double %tmp14, 1.300000e+00
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store double %tmp17, double* %tmp16, align 4
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%tmp18 = add nsw i32 %tmp15, 1
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br label %bb6
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bb19: ; preds = %bb6
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ret void
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}
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; A simple loop with two entries and an inner natural loop.
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; CHECK-LABEL: test1:
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; CHECK: f64.load
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; CHECK: i32.const $[[REG:[^,]+]]=
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; CHECK: br_table $[[REG]],
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define void @test1(double* %arg, i32 %arg1, i32 %arg2, i32 %arg3) {
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bb:
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%tmp = icmp eq i32 %arg2, 0
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br i1 %tmp, label %bb6, label %bb3
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bb3: ; preds = %bb
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%tmp4 = getelementptr double, double* %arg, i32 %arg3
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%tmp5 = load double, double* %tmp4, align 4
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br label %bb13
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bb6: ; preds = %bb13, %bb
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%tmp7 = phi i32 [ %tmp18, %bb13 ], [ 0, %bb ]
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%tmp8 = icmp slt i32 %tmp7, %arg1
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br i1 %tmp8, label %bb9, label %bb19
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bb9: ; preds = %bb6
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%tmp10 = getelementptr double, double* %arg, i32 %tmp7
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%tmp11 = load double, double* %tmp10, align 4
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%tmp12 = fmul double %tmp11, 2.300000e+00
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store double %tmp12, double* %tmp10, align 4
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br label %bb10
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bb10: ; preds = %bb10, %bb9
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%p = phi i32 [ 0, %bb9 ], [ %pn, %bb10 ]
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%pn = add i32 %p, 1
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%c = icmp slt i32 %pn, 256
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br i1 %c, label %bb10, label %bb13
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bb13: ; preds = %bb10, %bb3
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%tmp14 = phi double [ %tmp5, %bb3 ], [ %tmp12, %bb10 ]
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%tmp15 = phi i32 [ undef, %bb3 ], [ %tmp7, %bb10 ]
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%tmp16 = getelementptr double, double* %arg, i32 %tmp15
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%tmp17 = fadd double %tmp14, 1.300000e+00
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store double %tmp17, double* %tmp16, align 4
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%tmp18 = add nsw i32 %tmp15, 1
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br label %bb6
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bb19: ; preds = %bb6
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ret void
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}
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; A simple loop 2 blocks that are both entries: A1 and A2.
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; Even though A1 and A2 both have 3 predecessors (A0, A1, and A2), not 6 but
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; only 4 new routing blocks to the dispatch block should be generated.
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; CHECK-LABEL: test2:
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; CHECK: br_if
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; CHECK: i32.const $[[REG:[^,]+]]=
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; CHECK: i32.const $[[REG]]=
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; CHECK: br_table $[[REG]],
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; CHECK: i32.const $[[REG]]=
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; CHECK: i32.const $[[REG]]=
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; CHECK-NOT: i32.const $[[REG]]=
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define i32 @test2(i32) {
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entry:
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br label %A0
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A0: ; preds = %entry
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%a0a = tail call i32 @test2(i32 1)
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%a0b = icmp eq i32 %a0a, 0
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br i1 %a0b, label %A1, label %A2
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A1: ; preds = %A2, %A1, %A0
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%a1a = tail call i32 @test2(i32 2)
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%a1b = icmp eq i32 %a1a, 0
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br i1 %a1b, label %A1, label %A2
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A2: ; preds = %A2, %A1, %A0
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%a2a = tail call i32 @test2(i32 3)
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%a2b = icmp eq i32 %a2a, 0
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br i1 %a2b, label %A1, label %A2
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}
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; An interesting loop with inner loop and if-else structure too.
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; CHECK-LABEL: test3:
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; CHECK: br_if
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define void @test3(i32 %ws) {
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entry:
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%ws.addr = alloca i32, align 4
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store volatile i32 %ws, i32* %ws.addr, align 4
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%0 = load volatile i32, i32* %ws.addr, align 4
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%tobool = icmp ne i32 %0, 0
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br i1 %tobool, label %if.then, label %if.end
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if.then: ; preds = %entry
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br label %wynn
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if.end: ; preds = %entry
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%1 = load volatile i32, i32* %ws.addr, align 4
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%tobool1 = icmp ne i32 %1, 0
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br i1 %tobool1, label %if.end9, label %if.then2
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if.then2: ; preds = %if.end
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br label %for.cond
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for.cond: ; preds = %wynn, %if.then7, %if.then2
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%2 = load volatile i32, i32* %ws.addr, align 4
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%tobool3 = icmp ne i32 %2, 0
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br i1 %tobool3, label %if.then4, label %if.end5
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if.then4: ; preds = %for.cond
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br label %if.end5
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if.end5: ; preds = %if.then4, %for.cond
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%3 = load volatile i32, i32* %ws.addr, align 4
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%tobool6 = icmp ne i32 %3, 0
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br i1 %tobool6, label %if.then7, label %if.end8
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if.then7: ; preds = %if.end5
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br label %for.cond
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if.end8: ; preds = %if.end5
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br label %wynn
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wynn: ; preds = %if.end8, %if.then
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br label %for.cond
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if.end9: ; preds = %if.end
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ret void
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}
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; Multi-level irreducibility, after reducing in the main scope we must then
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; reduce in the inner loop that we just created.
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; CHECK: br_table
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; CHECK: br_table
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define void @pi_next() {
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entry:
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br i1 undef, label %sw.bb5, label %return
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sw.bb5: ; preds = %entry
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br i1 undef, label %if.then.i49, label %if.else.i52
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if.then.i49: ; preds = %sw.bb5
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br label %for.inc197.i
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if.else.i52: ; preds = %sw.bb5
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br label %for.cond57.i
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for.cond57.i: ; preds = %for.inc205.i, %if.else.i52
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store i32 0, i32* undef, align 4
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br label %for.cond65.i
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for.cond65.i: ; preds = %for.inc201.i, %for.cond57.i
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br i1 undef, label %for.body70.i, label %for.inc205.i
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for.body70.i: ; preds = %for.cond65.i
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br label %for.cond76.i
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for.cond76.i: ; preds = %for.inc197.i, %for.body70.i
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%0 = phi i32 [ %inc199.i, %for.inc197.i ], [ 0, %for.body70.i ]
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%cmp81.i = icmp slt i32 %0, 0
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br i1 %cmp81.i, label %for.body82.i, label %for.inc201.i
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for.body82.i: ; preds = %for.cond76.i
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br label %for.inc197.i
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for.inc197.i: ; preds = %for.body82.i, %if.then.i49
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%inc199.i = add nsw i32 undef, 1
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br label %for.cond76.i
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for.inc201.i: ; preds = %for.cond76.i
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br label %for.cond65.i
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for.inc205.i: ; preds = %for.cond65.i
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br label %for.cond57.i
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return: ; preds = %entry
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ret void
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}
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; A more complx case of irreducible control flow, two interacting loops.
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; CHECK: ps_hints_apply
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; CHECK: br_table
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define void @ps_hints_apply() {
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entry:
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br label %psh
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psh: ; preds = %entry
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br i1 undef, label %for.cond, label %for.body
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for.body: ; preds = %psh
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br label %do.body
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do.body: ; preds = %do.cond, %for.body
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%cmp118 = icmp eq i32* undef, undef
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br i1 %cmp118, label %Skip, label %do.cond
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do.cond: ; preds = %do.body
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br label %do.body
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for.cond: ; preds = %Skip, %psh
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br label %for.body39
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for.body39: ; preds = %for.cond
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br i1 undef, label %Skip, label %do.body45
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do.body45: ; preds = %for.body39
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unreachable
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Skip: ; preds = %for.body39, %do.body
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br label %for.cond
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}
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; A simple sequence of loops with blocks in between, that should not be
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; misinterpreted as irreducible control flow.
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; CHECK: fannkuch_worker
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; CHECK-NOT: br_table
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define i32 @fannkuch_worker(i8* %_arg) {
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for.cond:
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br label %do.body
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do.body: ; preds = %do.cond, %for.cond
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br label %for.cond1
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for.cond1: ; preds = %for.cond1, %do.body
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br i1 true, label %for.cond1, label %for.end
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for.end: ; preds = %for.cond1
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br label %do.cond
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do.cond: ; preds = %for.end
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br i1 true, label %do.body, label %do.end
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do.end: ; preds = %do.cond
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br label %for.cond2
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for.cond2: ; preds = %for.end6, %do.end
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br label %for.cond3
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for.cond3: ; preds = %for.cond3, %for.cond2
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br i1 true, label %for.cond3, label %for.end6
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for.end6: ; preds = %for.cond3
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br label %for.cond2
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return: ; No predecessors!
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ret i32 1
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}
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; Test an interesting pattern of nested irreducibility.
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; CHECK: func_2:
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; CHECK: br_table
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define void @func_2() {
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entry:
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br i1 undef, label %lbl_937, label %if.else787
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lbl_937: ; preds = %for.body978, %entry
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br label %if.end965
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if.else787: ; preds = %entry
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br label %if.end965
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if.end965: ; preds = %if.else787, %lbl_937
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br label %for.cond967
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for.cond967: ; preds = %for.end1035, %if.end965
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br label %for.cond975
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for.cond975: ; preds = %if.end984, %for.cond967
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br i1 undef, label %for.body978, label %for.end1035
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for.body978: ; preds = %for.cond975
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br i1 undef, label %lbl_937, label %if.end984
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if.end984: ; preds = %for.body978
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br label %for.cond975
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for.end1035: ; preds = %for.cond975
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br label %for.cond967
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}
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