53 lines
1.9 KiB
LLVM
53 lines
1.9 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-- -mcpu=generic | FileCheck %s
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; PR1872
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%struct.c34007g__designated___XUB = type { i32, i32, i32, i32 }
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%struct.c34007g__pkg__parent = type { i32*, %struct.c34007g__designated___XUB* }
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define void @_ada_c34007g() {
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; CHECK-LABEL: _ada_c34007g:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushl %ebp
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: .cfi_offset %ebp, -8
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; CHECK-NEXT: movl %esp, %ebp
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; CHECK-NEXT: .cfi_def_cfa_register %ebp
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; CHECK-NEXT: andl $-8, %esp
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; CHECK-NEXT: subl $8, %esp
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; CHECK-NEXT: movl (%esp), %eax
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; CHECK-NEXT: testl %eax, %eax
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; CHECK-NEXT: je .LBB0_3
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: orl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: jne .LBB0_3
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; CHECK-NEXT: # %bb.2: # %entry
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; CHECK-NEXT: movb $1, %al
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: .LBB0_3: # %bb5507
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; CHECK-NEXT: movl %ebp, %esp
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; CHECK-NEXT: popl %ebp
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; CHECK-NEXT: .cfi_def_cfa %esp, 4
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; CHECK-NEXT: retl
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entry:
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%x8 = alloca %struct.c34007g__pkg__parent, align 8 ; <%struct.c34007g__pkg__parent*> [#uses=2]
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%tmp1272 = getelementptr %struct.c34007g__pkg__parent, %struct.c34007g__pkg__parent* %x8, i32 0, i32 0 ; <i32**> [#uses=1]
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%x82167 = bitcast %struct.c34007g__pkg__parent* %x8 to i64* ; <i64*> [#uses=1]
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br i1 true, label %bb4668, label %bb848
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bb4668: ; preds = %bb4648
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%tmp5464 = load i64, i64* %x82167, align 8 ; <i64> [#uses=1]
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%tmp5467 = icmp ne i64 0, %tmp5464 ; <i1> [#uses=1]
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%tmp5470 = load i32*, i32** %tmp1272, align 8 ; <i32*> [#uses=1]
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%tmp5471 = icmp eq i32* %tmp5470, null ; <i1> [#uses=1]
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%tmp5475 = or i1 %tmp5471, %tmp5467 ; <i1> [#uses=1]
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%tmp5497 = or i1 %tmp5475, false ; <i1> [#uses=1]
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br i1 %tmp5497, label %bb848, label %bb5507
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bb848: ; preds = %entry
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ret void
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bb5507: ; preds = %bb4668
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ret void
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}
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