86 lines
4.7 KiB
LLVM
86 lines
4.7 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs -mcpu=znver2 -O2 -frame-pointer=none < %s | FileCheck %s
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; Make sure that instructions aren't scheduled after the "callbr". In the
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; example below, we don't want the "shrxq" through "leaq" instructions to be
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; moved after the "callbr".
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%struct.cpuinfo_x86 = type { i8, i8, i8, i8, i32, [3 x i32], i8, i8, i8, i8, i32, i32, %union.anon.83, [16 x i8], [64 x i8], i32, i32, i32, i32, i32, i32, i64, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i32, i8, i8 }
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%union.anon.83 = type { i64, [72 x i8] }
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%struct.pgd_t = type { i64 }
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%struct.p4d_t = type { i64 }
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%struct.pud_t = type { i64 }
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@boot_cpu_data = external dso_local global %struct.cpuinfo_x86, align 8
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@page_offset_base = external dso_local local_unnamed_addr global i64, align 8
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@pgdir_shift = external dso_local local_unnamed_addr global i32, align 4
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@__force_order = external dso_local global i64, align 8
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@ptrs_per_p4d = external dso_local local_unnamed_addr global i32, align 4
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define i64 @early_ioremap_pmd(i64 %addr) {
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; CHECK-LABEL: early_ioremap_pmd:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: #APP
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; CHECK-NEXT: movq %cr3, %rax
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; CHECK-EMPTY:
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: movabsq $9223372036854771712, %rdx # imm = 0x7FFFFFFFFFFFF000
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; CHECK-NEXT: andq %rax, %rdx
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; CHECK-NEXT: movb {{.*}}(%rip), %al
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; CHECK-NEXT: movq {{.*}}(%rip), %rcx
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; CHECK-NEXT: shrxq %rax, %rdi, %rax
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; CHECK-NEXT: addq %rcx, %rdx
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; CHECK-NEXT: andl $511, %eax # imm = 0x1FF
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; CHECK-NEXT: leaq (%rdx,%rax,8), %rax
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; CHECK-NEXT: #APP
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; CHECK-NEXT: .Ltmp2:
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; CHECK-NEXT: jmp .Ltmp3
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; CHECK-NEXT: .Ltmp4:
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; CHECK-NEXT: .zero (-(((.Ltmp5-.Ltmp6)-(.Ltmp4-.Ltmp2))>0))*((.Ltmp5-.Ltmp6)-(.Ltmp4-.Ltmp2)),144
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; CHECK-NEXT: .Ltmp7:
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entry:
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%0 = tail call i64 asm sideeffect "mov %cr3,$0\0A\09", "=r,=*m,~{dirflag},~{fpsr},~{flags}"(i64* nonnull @__force_order)
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%and.i = and i64 %0, 9223372036854771712
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%1 = load i64, i64* @page_offset_base, align 8
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%add = add i64 %and.i, %1
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%2 = inttoptr i64 %add to %struct.pgd_t*
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%3 = load i32, i32* @pgdir_shift, align 4
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%sh_prom = zext i32 %3 to i64
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%shr = lshr i64 %addr, %sh_prom
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%and = and i64 %shr, 511
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%arrayidx = getelementptr %struct.pgd_t, %struct.pgd_t* %2, i64 %and
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callbr void asm sideeffect "1: jmp 6f\0A2:\0A.skip -(((5f-4f) - (2b-1b)) > 0) * ((5f-4f) - (2b-1b)),0x90\0A3:\0A.section .altinstructions,\22a\22\0A .long 1b - .\0A .long 4f - .\0A .word ${1:P}\0A .byte 3b - 1b\0A .byte 5f - 4f\0A .byte 3b - 2b\0A.previous\0A.section .altinstr_replacement,\22ax\22\0A4: jmp ${5:l}\0A5:\0A.previous\0A.section .altinstructions,\22a\22\0A .long 1b - .\0A .long 0\0A .word ${0:P}\0A .byte 3b - 1b\0A .byte 0\0A .byte 0\0A.previous\0A.section .altinstr_aux,\22ax\22\0A6:\0A testb $2,$3\0A jnz ${4:l}\0A jmp ${5:l}\0A.previous\0A", "i,i,i,*m,X,X,~{dirflag},~{fpsr},~{flags}"(i16 528, i32 117, i32 1, i8* getelementptr inbounds (%struct.cpuinfo_x86, %struct.cpuinfo_x86* @boot_cpu_data, i64 0, i32 12, i32 1, i64 58), i8* blockaddress(@early_ioremap_pmd, %if.end.i), i8* blockaddress(@early_ioremap_pmd, %if.then.i))
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to label %_static_cpu_has.exit.thread.i [label %if.end.i, label %if.then.i]
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_static_cpu_has.exit.thread.i: ; preds = %entry
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br label %if.end.i
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if.then.i: ; preds = %entry
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%4 = bitcast %struct.pgd_t* %arrayidx to %struct.p4d_t*
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br label %p4d_offset.exit
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if.end.i: ; preds = %_static_cpu_has.exit.thread.i, %entry
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%coerce.dive.i = getelementptr inbounds %struct.pgd_t, %struct.pgd_t* %arrayidx, i64 0, i32 0
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%5 = load i64, i64* %coerce.dive.i, align 8
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%6 = inttoptr i64 %5 to %struct.p4d_t*
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%7 = load i32, i32* @ptrs_per_p4d, align 4
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%sub.i.i = add i32 %7, 33554431
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%8 = and i32 %sub.i.i, 33554431
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%and.i1.i = zext i32 %8 to i64
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%add.ptr.i = getelementptr %struct.p4d_t, %struct.p4d_t* %6, i64 %and.i1.i
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br label %p4d_offset.exit
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p4d_offset.exit: ; preds = %if.end.i, %if.then.i
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%retval.0.i = phi %struct.p4d_t* [ %add.ptr.i, %if.end.i ], [ %4, %if.then.i ]
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%coerce.dive.i12 = getelementptr inbounds %struct.p4d_t, %struct.p4d_t* %retval.0.i, i64 0, i32 0
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%9 = load i64, i64* %coerce.dive.i12, align 8
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%and.i.i13 = and i64 %9, 4503599627366400
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%add.i.i14 = add i64 %and.i.i13, %1
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%10 = inttoptr i64 %add.i.i14 to %struct.pud_t*
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%coerce.dive.i16 = getelementptr %struct.pud_t, %struct.pud_t* %10, i64 511, i32 0
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%11 = load i64, i64* %coerce.dive.i16, align 8
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%tobool.i.i.i = icmp slt i64 %11, 0
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%..i.i.i = select i1 %tobool.i.i.i, i64 4503598553628672, i64 4503599627366400
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ret i64 %..i.i.i
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}
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