394 lines
11 KiB
LLVM
394 lines
11 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2,-avx | FileCheck %s --check-prefix=SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1,-avx | FileCheck %s --check-prefix=SSE41
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,-avx2 | FileCheck %s --check-prefixes=AVX,AVX1
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512dq,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
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define i32 @veccond128(<4 x i32> %input) {
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; SSE2-LABEL: veccond128:
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; SSE2: # %bb.0: # %entry
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; SSE2-NEXT: pxor %xmm1, %xmm1
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; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
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; SSE2-NEXT: pmovmskb %xmm1, %eax
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; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
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; SSE2-NEXT: je .LBB0_2
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; SSE2-NEXT: # %bb.1: # %if-true-block
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; SSE2-NEXT: xorl %eax, %eax
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; SSE2-NEXT: retq
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; SSE2-NEXT: .LBB0_2: # %endif-block
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; SSE2-NEXT: movl $1, %eax
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: veccond128:
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; SSE41: # %bb.0: # %entry
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; SSE41-NEXT: ptest %xmm0, %xmm0
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; SSE41-NEXT: je .LBB0_2
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; SSE41-NEXT: # %bb.1: # %if-true-block
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; SSE41-NEXT: xorl %eax, %eax
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; SSE41-NEXT: retq
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; SSE41-NEXT: .LBB0_2: # %endif-block
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; SSE41-NEXT: movl $1, %eax
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; SSE41-NEXT: retq
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;
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; AVX-LABEL: veccond128:
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; AVX: # %bb.0: # %entry
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; AVX-NEXT: vptest %xmm0, %xmm0
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; AVX-NEXT: je .LBB0_2
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; AVX-NEXT: # %bb.1: # %if-true-block
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; AVX-NEXT: xorl %eax, %eax
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; AVX-NEXT: retq
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; AVX-NEXT: .LBB0_2: # %endif-block
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; AVX-NEXT: movl $1, %eax
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; AVX-NEXT: retq
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entry:
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%0 = bitcast <4 x i32> %input to i128
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%1 = icmp ne i128 %0, 0
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br i1 %1, label %if-true-block, label %endif-block
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if-true-block:
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ret i32 0
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endif-block:
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ret i32 1
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}
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define i32 @veccond256(<8 x i32> %input) {
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; SSE2-LABEL: veccond256:
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; SSE2: # %bb.0: # %entry
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; SSE2-NEXT: por %xmm1, %xmm0
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; SSE2-NEXT: pxor %xmm1, %xmm1
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; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
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; SSE2-NEXT: pmovmskb %xmm1, %eax
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; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
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; SSE2-NEXT: je .LBB1_2
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; SSE2-NEXT: # %bb.1: # %if-true-block
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; SSE2-NEXT: xorl %eax, %eax
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; SSE2-NEXT: retq
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; SSE2-NEXT: .LBB1_2: # %endif-block
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; SSE2-NEXT: movl $1, %eax
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: veccond256:
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; SSE41: # %bb.0: # %entry
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; SSE41-NEXT: por %xmm1, %xmm0
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; SSE41-NEXT: ptest %xmm0, %xmm0
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; SSE41-NEXT: je .LBB1_2
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; SSE41-NEXT: # %bb.1: # %if-true-block
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; SSE41-NEXT: xorl %eax, %eax
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; SSE41-NEXT: retq
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; SSE41-NEXT: .LBB1_2: # %endif-block
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; SSE41-NEXT: movl $1, %eax
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; SSE41-NEXT: retq
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;
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; AVX-LABEL: veccond256:
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; AVX: # %bb.0: # %entry
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; AVX-NEXT: vptest %ymm0, %ymm0
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; AVX-NEXT: je .LBB1_2
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; AVX-NEXT: # %bb.1: # %if-true-block
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; AVX-NEXT: xorl %eax, %eax
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; AVX-NEXT: vzeroupper
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; AVX-NEXT: retq
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; AVX-NEXT: .LBB1_2: # %endif-block
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; AVX-NEXT: movl $1, %eax
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; AVX-NEXT: vzeroupper
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; AVX-NEXT: retq
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entry:
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%0 = bitcast <8 x i32> %input to i256
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%1 = icmp ne i256 %0, 0
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br i1 %1, label %if-true-block, label %endif-block
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if-true-block:
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ret i32 0
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endif-block:
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ret i32 1
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}
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define i32 @veccond512(<16 x i32> %input) {
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; SSE2-LABEL: veccond512:
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; SSE2: # %bb.0: # %entry
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; SSE2-NEXT: por %xmm3, %xmm1
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; SSE2-NEXT: por %xmm2, %xmm1
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; SSE2-NEXT: por %xmm0, %xmm1
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; SSE2-NEXT: pxor %xmm0, %xmm0
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; SSE2-NEXT: pcmpeqb %xmm1, %xmm0
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; SSE2-NEXT: pmovmskb %xmm0, %eax
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; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
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; SSE2-NEXT: je .LBB2_2
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; SSE2-NEXT: # %bb.1: # %if-true-block
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; SSE2-NEXT: xorl %eax, %eax
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; SSE2-NEXT: retq
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; SSE2-NEXT: .LBB2_2: # %endif-block
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; SSE2-NEXT: movl $1, %eax
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: veccond512:
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; SSE41: # %bb.0: # %entry
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; SSE41-NEXT: por %xmm3, %xmm1
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; SSE41-NEXT: por %xmm2, %xmm1
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; SSE41-NEXT: por %xmm0, %xmm1
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; SSE41-NEXT: ptest %xmm1, %xmm1
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; SSE41-NEXT: je .LBB2_2
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; SSE41-NEXT: # %bb.1: # %if-true-block
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; SSE41-NEXT: xorl %eax, %eax
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; SSE41-NEXT: retq
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; SSE41-NEXT: .LBB2_2: # %endif-block
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; SSE41-NEXT: movl $1, %eax
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; SSE41-NEXT: retq
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;
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; AVX1-LABEL: veccond512:
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; AVX1: # %bb.0: # %entry
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; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
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; AVX1-NEXT: vptest %ymm0, %ymm0
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; AVX1-NEXT: je .LBB2_2
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; AVX1-NEXT: # %bb.1: # %if-true-block
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; AVX1-NEXT: xorl %eax, %eax
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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; AVX1-NEXT: .LBB2_2: # %endif-block
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; AVX1-NEXT: movl $1, %eax
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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; AVX512-LABEL: veccond512:
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; AVX512: # %bb.0: # %entry
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; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
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; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
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; AVX512-NEXT: vptest %ymm0, %ymm0
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; AVX512-NEXT: je .LBB2_2
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; AVX512-NEXT: # %bb.1: # %if-true-block
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; AVX512-NEXT: xorl %eax, %eax
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; AVX512-NEXT: vzeroupper
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; AVX512-NEXT: retq
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; AVX512-NEXT: .LBB2_2: # %endif-block
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; AVX512-NEXT: movl $1, %eax
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; AVX512-NEXT: vzeroupper
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; AVX512-NEXT: retq
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entry:
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%0 = bitcast <16 x i32> %input to i512
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%1 = icmp ne i512 %0, 0
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br i1 %1, label %if-true-block, label %endif-block
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if-true-block:
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ret i32 0
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endif-block:
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ret i32 1
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}
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define i32 @vectest128(<4 x i32> %input) {
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; SSE2-LABEL: vectest128:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pxor %xmm1, %xmm1
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; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
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; SSE2-NEXT: pmovmskb %xmm1, %ecx
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; SSE2-NEXT: xorl %eax, %eax
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; SSE2-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
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; SSE2-NEXT: setne %al
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: vectest128:
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; SSE41: # %bb.0:
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; SSE41-NEXT: xorl %eax, %eax
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; SSE41-NEXT: ptest %xmm0, %xmm0
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; SSE41-NEXT: setne %al
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; SSE41-NEXT: retq
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;
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; AVX-LABEL: vectest128:
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; AVX: # %bb.0:
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; AVX-NEXT: xorl %eax, %eax
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; AVX-NEXT: vptest %xmm0, %xmm0
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; AVX-NEXT: setne %al
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; AVX-NEXT: retq
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%t0 = bitcast <4 x i32> %input to i128
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%t1 = icmp ne i128 %t0, 0
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%t2 = zext i1 %t1 to i32
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ret i32 %t2
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}
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define i32 @vectest256(<8 x i32> %input) {
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; SSE2-LABEL: vectest256:
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; SSE2: # %bb.0:
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; SSE2-NEXT: por %xmm1, %xmm0
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; SSE2-NEXT: pxor %xmm1, %xmm1
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; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
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; SSE2-NEXT: pmovmskb %xmm1, %ecx
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; SSE2-NEXT: xorl %eax, %eax
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; SSE2-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
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; SSE2-NEXT: setne %al
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: vectest256:
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; SSE41: # %bb.0:
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; SSE41-NEXT: por %xmm1, %xmm0
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; SSE41-NEXT: xorl %eax, %eax
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; SSE41-NEXT: ptest %xmm0, %xmm0
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; SSE41-NEXT: setne %al
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; SSE41-NEXT: retq
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;
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; AVX-LABEL: vectest256:
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; AVX: # %bb.0:
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; AVX-NEXT: xorl %eax, %eax
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; AVX-NEXT: vptest %ymm0, %ymm0
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; AVX-NEXT: setne %al
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; AVX-NEXT: vzeroupper
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; AVX-NEXT: retq
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%t0 = bitcast <8 x i32> %input to i256
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%t1 = icmp ne i256 %t0, 0
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%t2 = zext i1 %t1 to i32
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ret i32 %t2
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}
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define i32 @vectest512(<16 x i32> %input) {
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; SSE2-LABEL: vectest512:
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; SSE2: # %bb.0:
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; SSE2-NEXT: por %xmm3, %xmm1
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; SSE2-NEXT: por %xmm2, %xmm1
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; SSE2-NEXT: por %xmm0, %xmm1
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; SSE2-NEXT: pxor %xmm0, %xmm0
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; SSE2-NEXT: pcmpeqb %xmm1, %xmm0
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; SSE2-NEXT: pmovmskb %xmm0, %ecx
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; SSE2-NEXT: xorl %eax, %eax
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; SSE2-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
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; SSE2-NEXT: setne %al
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: vectest512:
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; SSE41: # %bb.0:
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; SSE41-NEXT: por %xmm3, %xmm1
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; SSE41-NEXT: por %xmm2, %xmm1
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; SSE41-NEXT: por %xmm0, %xmm1
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; SSE41-NEXT: xorl %eax, %eax
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; SSE41-NEXT: ptest %xmm1, %xmm1
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; SSE41-NEXT: setne %al
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; SSE41-NEXT: retq
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;
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; AVX1-LABEL: vectest512:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
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; AVX1-NEXT: xorl %eax, %eax
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; AVX1-NEXT: vptest %ymm0, %ymm0
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; AVX1-NEXT: setne %al
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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; AVX512-LABEL: vectest512:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
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; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
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; AVX512-NEXT: xorl %eax, %eax
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; AVX512-NEXT: vptest %ymm0, %ymm0
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; AVX512-NEXT: setne %al
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; AVX512-NEXT: vzeroupper
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; AVX512-NEXT: retq
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%t0 = bitcast <16 x i32> %input to i512
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%t1 = icmp ne i512 %t0, 0
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%t2 = zext i1 %t1 to i32
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ret i32 %t2
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}
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define i32 @vecsel128(<4 x i32> %input, i32 %a, i32 %b) {
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; SSE2-LABEL: vecsel128:
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; SSE2: # %bb.0:
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; SSE2-NEXT: movl %edi, %eax
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; SSE2-NEXT: pxor %xmm1, %xmm1
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; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
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; SSE2-NEXT: pmovmskb %xmm1, %ecx
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; SSE2-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
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; SSE2-NEXT: cmovel %esi, %eax
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: vecsel128:
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; SSE41: # %bb.0:
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; SSE41-NEXT: movl %edi, %eax
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; SSE41-NEXT: ptest %xmm0, %xmm0
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; SSE41-NEXT: cmovel %esi, %eax
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; SSE41-NEXT: retq
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;
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; AVX-LABEL: vecsel128:
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|
|
; AVX: # %bb.0:
|
||
|
|
; AVX-NEXT: movl %edi, %eax
|
||
|
|
; AVX-NEXT: vptest %xmm0, %xmm0
|
||
|
|
; AVX-NEXT: cmovel %esi, %eax
|
||
|
|
; AVX-NEXT: retq
|
||
|
|
%t0 = bitcast <4 x i32> %input to i128
|
||
|
|
%t1 = icmp ne i128 %t0, 0
|
||
|
|
%t2 = select i1 %t1, i32 %a, i32 %b
|
||
|
|
ret i32 %t2
|
||
|
|
}
|
||
|
|
|
||
|
|
define i32 @vecsel256(<8 x i32> %input, i32 %a, i32 %b) {
|
||
|
|
; SSE2-LABEL: vecsel256:
|
||
|
|
; SSE2: # %bb.0:
|
||
|
|
; SSE2-NEXT: movl %edi, %eax
|
||
|
|
; SSE2-NEXT: por %xmm1, %xmm0
|
||
|
|
; SSE2-NEXT: pxor %xmm1, %xmm1
|
||
|
|
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
|
||
|
|
; SSE2-NEXT: pmovmskb %xmm1, %ecx
|
||
|
|
; SSE2-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
|
||
|
|
; SSE2-NEXT: cmovel %esi, %eax
|
||
|
|
; SSE2-NEXT: retq
|
||
|
|
;
|
||
|
|
; SSE41-LABEL: vecsel256:
|
||
|
|
; SSE41: # %bb.0:
|
||
|
|
; SSE41-NEXT: movl %edi, %eax
|
||
|
|
; SSE41-NEXT: por %xmm1, %xmm0
|
||
|
|
; SSE41-NEXT: ptest %xmm0, %xmm0
|
||
|
|
; SSE41-NEXT: cmovel %esi, %eax
|
||
|
|
; SSE41-NEXT: retq
|
||
|
|
;
|
||
|
|
; AVX-LABEL: vecsel256:
|
||
|
|
; AVX: # %bb.0:
|
||
|
|
; AVX-NEXT: movl %edi, %eax
|
||
|
|
; AVX-NEXT: vptest %ymm0, %ymm0
|
||
|
|
; AVX-NEXT: cmovel %esi, %eax
|
||
|
|
; AVX-NEXT: vzeroupper
|
||
|
|
; AVX-NEXT: retq
|
||
|
|
%t0 = bitcast <8 x i32> %input to i256
|
||
|
|
%t1 = icmp ne i256 %t0, 0
|
||
|
|
%t2 = select i1 %t1, i32 %a, i32 %b
|
||
|
|
ret i32 %t2
|
||
|
|
}
|
||
|
|
|
||
|
|
define i32 @vecsel512(<16 x i32> %input, i32 %a, i32 %b) {
|
||
|
|
; SSE2-LABEL: vecsel512:
|
||
|
|
; SSE2: # %bb.0:
|
||
|
|
; SSE2-NEXT: movl %edi, %eax
|
||
|
|
; SSE2-NEXT: por %xmm3, %xmm1
|
||
|
|
; SSE2-NEXT: por %xmm2, %xmm1
|
||
|
|
; SSE2-NEXT: por %xmm0, %xmm1
|
||
|
|
; SSE2-NEXT: pxor %xmm0, %xmm0
|
||
|
|
; SSE2-NEXT: pcmpeqb %xmm1, %xmm0
|
||
|
|
; SSE2-NEXT: pmovmskb %xmm0, %ecx
|
||
|
|
; SSE2-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
|
||
|
|
; SSE2-NEXT: cmovel %esi, %eax
|
||
|
|
; SSE2-NEXT: retq
|
||
|
|
;
|
||
|
|
; SSE41-LABEL: vecsel512:
|
||
|
|
; SSE41: # %bb.0:
|
||
|
|
; SSE41-NEXT: movl %edi, %eax
|
||
|
|
; SSE41-NEXT: por %xmm3, %xmm1
|
||
|
|
; SSE41-NEXT: por %xmm2, %xmm1
|
||
|
|
; SSE41-NEXT: por %xmm0, %xmm1
|
||
|
|
; SSE41-NEXT: ptest %xmm1, %xmm1
|
||
|
|
; SSE41-NEXT: cmovel %esi, %eax
|
||
|
|
; SSE41-NEXT: retq
|
||
|
|
;
|
||
|
|
; AVX1-LABEL: vecsel512:
|
||
|
|
; AVX1: # %bb.0:
|
||
|
|
; AVX1-NEXT: movl %edi, %eax
|
||
|
|
; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
|
||
|
|
; AVX1-NEXT: vptest %ymm0, %ymm0
|
||
|
|
; AVX1-NEXT: cmovel %esi, %eax
|
||
|
|
; AVX1-NEXT: vzeroupper
|
||
|
|
; AVX1-NEXT: retq
|
||
|
|
;
|
||
|
|
; AVX512-LABEL: vecsel512:
|
||
|
|
; AVX512: # %bb.0:
|
||
|
|
; AVX512-NEXT: movl %edi, %eax
|
||
|
|
; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
|
||
|
|
; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0
|
||
|
|
; AVX512-NEXT: vptest %ymm0, %ymm0
|
||
|
|
; AVX512-NEXT: cmovel %esi, %eax
|
||
|
|
; AVX512-NEXT: vzeroupper
|
||
|
|
; AVX512-NEXT: retq
|
||
|
|
%t0 = bitcast <16 x i32> %input to i512
|
||
|
|
%t1 = icmp ne i512 %t0, 0
|
||
|
|
%t2 = select i1 %t1, i32 %a, i32 %b
|
||
|
|
ret i32 %t2
|
||
|
|
}
|