120 lines
3.0 KiB
LLVM
120 lines
3.0 KiB
LLVM
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; RUN: opt < %s -early-cse-memssa -earlycse-debug-hash -gvn-hoist -S | FileCheck %s
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; Make sure opt won't crash and that this pair of
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; instructions (load, icmp) is hoisted successfully
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; from bb45 and bb58 to bb41.
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@g_10 = external global i32, align 4
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@g_536 = external global i8*, align 8
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@g_1629 = external global i32**, align 8
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@g_963 = external global i32**, align 8
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@g_1276 = external global i32**, align 8
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;CHECK-LABEL: @func_22
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define void @func_22(i32* %arg, i32* %arg1) {
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bb:
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br label %bb12
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bb12:
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%tmp3.0 = phi i32 [ undef, %bb ], [ %tmp40, %bb36 ]
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%tmp7.0 = phi i32 [ undef, %bb ], [ %spec.select, %bb36 ]
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%tmp14 = icmp eq i32 %tmp3.0, 6
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br i1 %tmp14, label %bb41, label %bb15
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bb15:
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%tmp183 = trunc i16 0 to i8
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%tmp20 = load i8*, i8** @g_536, align 8
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%tmp21 = load i8, i8* %tmp20, align 1
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%tmp23 = or i8 %tmp21, %tmp183
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store i8 %tmp23, i8* %tmp20, align 1
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%tmp5.i = icmp eq i8 %tmp23, 0
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br i1 %tmp5.i, label %safe_div_func_uint8_t_u_u.exit, label %bb8.i
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bb8.i:
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%0 = udiv i8 1, %tmp23
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br label %safe_div_func_uint8_t_u_u.exit
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safe_div_func_uint8_t_u_u.exit:
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%tmp13.in.i = phi i8 [ %0, %bb8.i ], [ 1, %bb15 ]
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%tmp31 = icmp eq i8 %tmp13.in.i, 0
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%spec.select = select i1 %tmp31, i32 %tmp7.0, i32 53
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%tmp35 = icmp eq i32 %spec.select, 0
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br i1 %tmp35, label %bb36, label %bb41
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bb36:
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%tmp38 = sext i32 %tmp3.0 to i64
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%tmp40 = trunc i64 %tmp38 to i32
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br label %bb12
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;CHECK: bb41:
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;CHECK: %tmp47 = load i32, i32* %arg1, align 4
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;CHECK: %tmp48 = icmp eq i32 %tmp47, 0
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bb41:
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%tmp43 = load i32, i32* %arg, align 4
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%tmp44 = icmp eq i32 %tmp43, 0
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br i1 %tmp44, label %bb52, label %bb45
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;CHECK: bb45:
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;CHECK-NOT: %tmp47 = load i32, i32* %arg1, align 4
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;CHECK-NOT: %tmp48 = icmp eq i32 %tmp47, 0
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bb45:
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%tmp47 = load i32, i32* %arg1, align 4
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%tmp48 = icmp eq i32 %tmp47, 0
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br i1 %tmp48, label %bb50, label %bb64
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bb50:
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%tmp51 = load volatile i32**, i32*** @g_963, align 8
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unreachable
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bb52:
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%tmp8.0 = phi i32 [ undef, %bb41 ], [ %tmp57, %bb55 ]
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%tmp54 = icmp slt i32 %tmp8.0, 3
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br i1 %tmp54, label %bb55, label %bb58
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bb55:
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%tmp57 = add nsw i32 %tmp8.0, 1
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br label %bb52
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;CHECK: bb58:
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;CHECK-NOT: %tmp60 = load i32, i32* %arg1, align 4
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;CHECK-NOT: %tmp61 = icmp eq i32 %tmp60, 0
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bb58:
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%tmp60 = load i32, i32* %arg1, align 4
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%tmp61 = icmp eq i32 %tmp60, 0
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br i1 %tmp61, label %bb62, label %bb64
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bb62:
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%tmp63 = load volatile i32**, i32*** @g_1276, align 8
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unreachable
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bb64:
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%tmp65 = load volatile i32**, i32*** @g_1629, align 8
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unreachable
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; uselistorder directives
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uselistorder i32 %spec.select, { 1, 0 }
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uselistorder i32* %arg1, { 1, 0 }
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uselistorder label %bb64, { 1, 0 }
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uselistorder label %bb52, { 1, 0 }
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uselistorder label %bb41, { 1, 0 }
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uselistorder label %safe_div_func_uint8_t_u_u.exit, { 1, 0 }
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}
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define zeroext i8 @safe_div_func_uint8_t_u_u(i8 zeroext %arg, i8 zeroext %arg1) {
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bb:
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%tmp5 = icmp eq i8 %arg1, 0
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br i1 %tmp5, label %bb12, label %bb8
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bb8:
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%0 = udiv i8 %arg, %arg1
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br label %bb12
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bb12:
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%tmp13.in = phi i8 [ %0, %bb8 ], [ %arg, %bb ]
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ret i8 %tmp13.in
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}
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