141 lines
4.2 KiB
LLVM
141 lines
4.2 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -loop-reduce -S < %s | FileCheck %s
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;
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; Test LSR's use of SplitCriticalEdge during phi rewriting.
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target triple = "x86_64-apple-darwin"
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; Provide legal integer types.
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target datalayout = "n8:16:32:64"
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; Verify that identical edges are merged. rdar://problem/6453893
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define i8* @test1() {
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;
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[LSR_IV_NEXT]] = add nuw nsw i64 [[LSR_IV]], 1
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; CHECK-NEXT: [[LSR_IV_NEXT1:%.*]] = inttoptr i64 [[LSR_IV_NEXT]] to i8*
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; CHECK-NEXT: br i1 false, label [[LOOP]], label [[LOOPEXIT:%.*]]
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; CHECK: loopexit:
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; CHECK-NEXT: br i1 false, label [[BBA:%.*]], label [[BBB:%.*]]
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; CHECK: bbA:
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; CHECK-NEXT: switch i32 0, label [[BBA_BB89_CRIT_EDGE:%.*]] [
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; CHECK-NEXT: i32 47, label [[BBA_BB89_CRIT_EDGE]]
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; CHECK-NEXT: i32 58, label [[BBA_BB89_CRIT_EDGE]]
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; CHECK-NEXT: ]
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; CHECK: bbA.bb89_crit_edge:
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; CHECK-NEXT: br label [[BB89:%.*]]
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; CHECK: bbB:
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; CHECK-NEXT: switch i8 0, label [[BBB_BB89_CRIT_EDGE:%.*]] [
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; CHECK-NEXT: i8 47, label [[BBB_BB89_CRIT_EDGE]]
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; CHECK-NEXT: i8 58, label [[BBB_BB89_CRIT_EDGE]]
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; CHECK-NEXT: ]
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; CHECK: bbB.bb89_crit_edge:
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; CHECK-NEXT: br label [[BB89]]
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; CHECK: bb89:
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; CHECK-NEXT: [[TMP75PHI:%.*]] = phi i8* [ [[LSR_IV_NEXT1]], [[BBA_BB89_CRIT_EDGE]] ], [ [[LSR_IV_NEXT1]], [[BBB_BB89_CRIT_EDGE]] ]
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret i8* [[TMP75PHI]]
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;
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entry:
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br label %loop
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loop:
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%rec = phi i32 [ %next, %loop ], [ 0, %entry ]
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%next = add i32 %rec, 1
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%tmp75 = getelementptr i8, i8* null, i32 %next
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br i1 false, label %loop, label %loopexit
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loopexit:
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br i1 false, label %bbA, label %bbB
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bbA:
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switch i32 0, label %bb89 [
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i32 47, label %bb89
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i32 58, label %bb89
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]
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bbB:
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switch i8 0, label %bb89 [
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i8 47, label %bb89
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i8 58, label %bb89
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]
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bb89:
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%tmp75phi = phi i8* [ %tmp75, %bbA ], [ %tmp75, %bbA ], [ %tmp75, %bbA ], [ %tmp75, %bbB ], [ %tmp75, %bbB ], [ %tmp75, %bbB ]
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br label %exit
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exit:
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ret i8* %tmp75phi
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}
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; Handle single-predecessor phis: PR13756
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define i8* @test2() {
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;
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[LSR_IV_NEXT]] = add nuw nsw i64 [[LSR_IV]], 1
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; CHECK-NEXT: [[LSR_IV_NEXT1:%.*]] = inttoptr i64 [[LSR_IV_NEXT]] to i8*
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; CHECK-NEXT: br i1 false, label [[LOOP]], label [[LOOPEXIT:%.*]]
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; CHECK: loopexit:
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; CHECK-NEXT: br i1 false, label [[BBA:%.*]], label [[BBB:%.*]]
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; CHECK: bbA:
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; CHECK-NEXT: switch i32 0, label [[BB89:%.*]] [
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; CHECK-NEXT: i32 47, label [[BB89]]
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; CHECK-NEXT: i32 58, label [[BB89]]
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; CHECK-NEXT: ]
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; CHECK: bbB:
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; CHECK-NEXT: switch i8 0, label [[BBB_EXIT_CRIT_EDGE:%.*]] [
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; CHECK-NEXT: i8 47, label [[BBB_EXIT_CRIT_EDGE]]
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; CHECK-NEXT: i8 58, label [[BBB_EXIT_CRIT_EDGE]]
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; CHECK-NEXT: ]
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; CHECK: bbB.exit_crit_edge:
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: bb89:
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; CHECK-NEXT: [[TMP75PHI:%.*]] = phi i8* [ [[LSR_IV_NEXT1]], [[BBA]] ], [ [[LSR_IV_NEXT1]], [[BBA]] ], [ [[LSR_IV_NEXT1]], [[BBA]] ]
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[RESULT:%.*]] = phi i8* [ [[TMP75PHI]], [[BB89]] ], [ [[LSR_IV_NEXT1]], [[BBB_EXIT_CRIT_EDGE]] ]
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; CHECK-NEXT: ret i8* [[RESULT]]
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;
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entry:
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br label %loop
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loop:
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%rec = phi i32 [ %next, %loop ], [ 0, %entry ]
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%next = add i32 %rec, 1
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%tmp75 = getelementptr i8, i8* null, i32 %next
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br i1 false, label %loop, label %loopexit
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loopexit:
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br i1 false, label %bbA, label %bbB
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bbA:
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switch i32 0, label %bb89 [
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i32 47, label %bb89
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i32 58, label %bb89
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]
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bbB:
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switch i8 0, label %exit [
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i8 47, label %exit
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i8 58, label %exit
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]
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bb89:
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%tmp75phi = phi i8* [ %tmp75, %bbA ], [ %tmp75, %bbA ], [ %tmp75, %bbA ]
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br label %exit
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exit:
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%result = phi i8* [ %tmp75phi, %bb89 ], [ %tmp75, %bbB ], [ %tmp75, %bbB ], [ %tmp75, %bbB ]
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ret i8* %result
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}
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