; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s 2>%t | FileCheck %s ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t ; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it. ; WARN-NOT: warning ; ; STNT1H, STNT1W, STNT1D: base + 64-bit index ; e.g. ; lsl z1.d, z1.d, #1 ; stnt1h { z0.d }, p0, [z0.d, x0] ; define void @sstnt1h_index( %data, %pg, i16* %base, %offsets) { ; CHECK-LABEL: sstnt1h_index ; CHECK: lsl z1.d, z1.d, #1 ; CHECK-NEXT: stnt1h { z0.d }, p0, [z1.d, x0] ; CHECK-NEXT: ret %data_trunc = trunc %data to call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( %data_trunc, %pg, i16* %base, %offsets) ret void } define void @sstnt1w_index( %data, %pg, i32* %base, %offsets) { ; CHECK-LABEL: sstnt1w_index ; CHECK: lsl z1.d, z1.d, #2 ; CHECK-NEXT: stnt1w { z0.d }, p0, [z1.d, x0] ; CHECK-NEXT: ret %data_trunc = trunc %data to call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( %data_trunc, %pg, i32* %base, %offsets) ret void } define void @sstnt1d_index( %data, %pg, i64* %base, %offsets) { ; CHECK-LABEL: sstnt1d_index ; CHECK: lsl z1.d, z1.d, #3 ; CHECK-NEXT: stnt1d { z0.d }, p0, [z1.d, x0] ; CHECK-NEXT: ret call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( %data, %pg, i64* %base, %offsets) ret void } define void @sstnt1d_index_double( %data, %pg, double* %base, %offsets) { ; CHECK-LABEL: sstnt1d_index_double ; CHECK: lsl z1.d, z1.d, #3 ; CHECK-NEXT: stnt1d { z0.d }, p0, [z1.d, x0] ; CHECK-NEXT: ret call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2f64( %data, %pg, double* %base, %offsets) ret void } declare void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16(, , i16*, ) declare void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32(, , i32*, ) declare void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64(, , i64*, ) declare void @llvm.aarch64.sve.stnt1.scatter.index.nxv2f64(, , double*, )