498 lines
19 KiB
C++
498 lines
19 KiB
C++
//===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines interfaces to access the target independent code generation
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// passes provided by the LLVM backend.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_PASSES_H
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#define LLVM_CODEGEN_PASSES_H
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#include "llvm/Support/CodeGen.h"
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#include <functional>
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#include <string>
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namespace llvm {
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class FunctionPass;
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class MachineFunction;
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class MachineFunctionPass;
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class MemoryBuffer;
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class ModulePass;
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class Pass;
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class TargetMachine;
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class TargetRegisterClass;
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class raw_ostream;
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} // End llvm namespace
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/// List of target independent CodeGen pass IDs.
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namespace llvm {
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FunctionPass *createAtomicExpandPass();
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/// createUnreachableBlockEliminationPass - The LLVM code generator does not
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/// work well with unreachable basic blocks (what live ranges make sense for a
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/// block that cannot be reached?). As such, a code generator should either
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/// not instruction select unreachable blocks, or run this pass as its
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/// last LLVM modifying pass to clean up blocks that are not reachable from
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/// the entry block.
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FunctionPass *createUnreachableBlockEliminationPass();
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/// createBasicBlockSections Pass - This pass assigns sections to machine
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/// basic blocks and is enabled with -fbasic-block-sections. Buf is a memory
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/// buffer that contains the list of functions and basic block ids to
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/// selectively enable basic block sections.
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MachineFunctionPass *createBasicBlockSectionsPass(const MemoryBuffer *Buf);
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/// createMachineFunctionSplitterPass - This pass splits machine functions
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/// using profile information.
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MachineFunctionPass *createMachineFunctionSplitterPass();
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/// MachineFunctionPrinter pass - This pass prints out the machine function to
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/// the given stream as a debugging tool.
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MachineFunctionPass *
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createMachineFunctionPrinterPass(raw_ostream &OS,
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const std::string &Banner ="");
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/// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
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/// using the MIR serialization format.
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MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
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/// This pass resets a MachineFunction when it has the FailedISel property
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/// as if it was just created.
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/// If EmitFallbackDiag is true, the pass will emit a
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/// DiagnosticInfoISelFallback for every MachineFunction it resets.
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/// If AbortOnFailedISel is true, abort compilation instead of resetting.
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MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag,
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bool AbortOnFailedISel);
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/// createCodeGenPreparePass - Transform the code to expose more pattern
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/// matching during instruction selection.
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FunctionPass *createCodeGenPreparePass();
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/// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
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/// load-linked/store-conditional loops.
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extern char &AtomicExpandID;
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/// MachineLoopInfo - This pass is a loop analysis pass.
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extern char &MachineLoopInfoID;
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/// MachineDominators - This pass is a machine dominators analysis pass.
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extern char &MachineDominatorsID;
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/// MachineDominanaceFrontier - This pass is a machine dominators analysis pass.
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extern char &MachineDominanceFrontierID;
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/// MachineRegionInfo - This pass computes SESE regions for machine functions.
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extern char &MachineRegionInfoPassID;
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/// EdgeBundles analysis - Bundle machine CFG edges.
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extern char &EdgeBundlesID;
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/// LiveVariables pass - This pass computes the set of blocks in which each
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/// variable is life and sets machine operand kill flags.
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extern char &LiveVariablesID;
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/// PHIElimination - This pass eliminates machine instruction PHI nodes
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/// by inserting copy instructions. This destroys SSA information, but is the
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/// desired input for some register allocators. This pass is "required" by
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/// these register allocator like this: AU.addRequiredID(PHIEliminationID);
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extern char &PHIEliminationID;
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/// LiveIntervals - This analysis keeps track of the live ranges of virtual
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/// and physical registers.
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extern char &LiveIntervalsID;
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/// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
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extern char &LiveStacksID;
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/// TwoAddressInstruction - This pass reduces two-address instructions to
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/// use two operands. This destroys SSA information but it is desired by
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/// register allocators.
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extern char &TwoAddressInstructionPassID;
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/// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
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extern char &ProcessImplicitDefsID;
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/// RegisterCoalescer - This pass merges live ranges to eliminate copies.
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extern char &RegisterCoalescerID;
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/// MachineScheduler - This pass schedules machine instructions.
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extern char &MachineSchedulerID;
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/// PostMachineScheduler - This pass schedules machine instructions postRA.
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extern char &PostMachineSchedulerID;
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/// SpillPlacement analysis. Suggest optimal placement of spill code between
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/// basic blocks.
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extern char &SpillPlacementID;
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/// ShrinkWrap pass. Look for the best place to insert save and restore
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// instruction and update the MachineFunctionInfo with that information.
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extern char &ShrinkWrapID;
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/// LiveRangeShrink pass. Move instruction close to its definition to shrink
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/// the definition's live range.
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extern char &LiveRangeShrinkID;
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/// Greedy register allocator.
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extern char &RAGreedyID;
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/// Basic register allocator.
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extern char &RABasicID;
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/// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
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/// assigned in VirtRegMap.
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extern char &VirtRegRewriterID;
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/// UnreachableMachineBlockElimination - This pass removes unreachable
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/// machine basic blocks.
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extern char &UnreachableMachineBlockElimID;
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/// DeadMachineInstructionElim - This pass removes dead machine instructions.
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extern char &DeadMachineInstructionElimID;
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/// This pass adds dead/undef flags after analyzing subregister lanes.
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extern char &DetectDeadLanesID;
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/// This pass perform post-ra machine sink for COPY instructions.
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extern char &PostRAMachineSinkingID;
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/// FastRegisterAllocation Pass - This pass register allocates as fast as
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/// possible. It is best suited for debug code where live ranges are short.
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///
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FunctionPass *createFastRegisterAllocator();
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/// BasicRegisterAllocation Pass - This pass implements a degenerate global
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/// register allocator using the basic regalloc framework.
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///
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FunctionPass *createBasicRegisterAllocator();
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/// Greedy register allocation pass - This pass implements a global register
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/// allocator for optimized builds.
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///
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FunctionPass *createGreedyRegisterAllocator();
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/// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
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/// Quadratic Prograaming (PBQP) based register allocator.
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///
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FunctionPass *createDefaultPBQPRegisterAllocator();
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/// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
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/// and eliminates abstract frame references.
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extern char &PrologEpilogCodeInserterID;
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MachineFunctionPass *createPrologEpilogInserterPass();
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/// ExpandPostRAPseudos - This pass expands pseudo instructions after
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/// register allocation.
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extern char &ExpandPostRAPseudosID;
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/// PostRAHazardRecognizer - This pass runs the post-ra hazard
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/// recognizer.
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extern char &PostRAHazardRecognizerID;
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/// PostRAScheduler - This pass performs post register allocation
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/// scheduling.
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extern char &PostRASchedulerID;
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/// BranchFolding - This pass performs machine code CFG based
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/// optimizations to delete branches to branches, eliminate branches to
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/// successor blocks (creating fall throughs), and eliminating branches over
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/// branches.
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extern char &BranchFolderPassID;
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/// BranchRelaxation - This pass replaces branches that need to jump further
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/// than is supported by a branch instruction.
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extern char &BranchRelaxationPassID;
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/// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
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extern char &MachineFunctionPrinterPassID;
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/// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
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/// serialization format.
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extern char &MIRPrintingPassID;
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/// TailDuplicate - Duplicate blocks with unconditional branches
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/// into tails of their predecessors.
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extern char &TailDuplicateID;
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/// Duplicate blocks with unconditional branches into tails of their
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/// predecessors. Variant that works before register allocation.
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extern char &EarlyTailDuplicateID;
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/// MachineTraceMetrics - This pass computes critical path and CPU resource
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/// usage in an ensemble of traces.
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extern char &MachineTraceMetricsID;
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/// EarlyIfConverter - This pass performs if-conversion on SSA form by
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/// inserting cmov instructions.
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extern char &EarlyIfConverterID;
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/// EarlyIfPredicator - This pass performs if-conversion on SSA form by
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/// predicating if/else block and insert select at the join point.
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extern char &EarlyIfPredicatorID;
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/// This pass performs instruction combining using trace metrics to estimate
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/// critical-path and resource depth.
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extern char &MachineCombinerID;
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/// StackSlotColoring - This pass performs stack coloring and merging.
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/// It merges disjoint allocas to reduce the stack size.
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extern char &StackColoringID;
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/// IfConverter - This pass performs machine code if conversion.
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extern char &IfConverterID;
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FunctionPass *createIfConverter(
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std::function<bool(const MachineFunction &)> Ftor);
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/// MachineBlockPlacement - This pass places basic blocks based on branch
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/// probabilities.
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extern char &MachineBlockPlacementID;
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/// MachineBlockPlacementStats - This pass collects statistics about the
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/// basic block placement using branch probabilities and block frequency
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/// information.
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extern char &MachineBlockPlacementStatsID;
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/// GCLowering Pass - Used by gc.root to perform its default lowering
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/// operations.
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FunctionPass *createGCLoweringPass();
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/// ShadowStackGCLowering - Implements the custom lowering mechanism
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/// used by the shadow stack GC. Only runs on functions which opt in to
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/// the shadow stack collector.
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FunctionPass *createShadowStackGCLoweringPass();
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/// GCMachineCodeAnalysis - Target-independent pass to mark safe points
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/// in machine code. Must be added very late during code generation, just
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/// prior to output, and importantly after all CFG transformations (such as
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/// branch folding).
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extern char &GCMachineCodeAnalysisID;
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/// Creates a pass to print GC metadata.
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///
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FunctionPass *createGCInfoPrinter(raw_ostream &OS);
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/// MachineCSE - This pass performs global CSE on machine instructions.
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extern char &MachineCSEID;
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/// MIRCanonicalizer - This pass canonicalizes MIR by renaming vregs
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/// according to the semantics of the instruction as well as hoists
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/// code.
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extern char &MIRCanonicalizerID;
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/// ImplicitNullChecks - This pass folds null pointer checks into nearby
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/// memory operations.
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extern char &ImplicitNullChecksID;
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/// This pass performs loop invariant code motion on machine instructions.
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extern char &MachineLICMID;
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/// This pass performs loop invariant code motion on machine instructions.
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/// This variant works before register allocation. \see MachineLICMID.
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extern char &EarlyMachineLICMID;
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/// MachineSinking - This pass performs sinking on machine instructions.
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extern char &MachineSinkingID;
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/// MachineCopyPropagation - This pass performs copy propagation on
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/// machine instructions.
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extern char &MachineCopyPropagationID;
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/// PeepholeOptimizer - This pass performs peephole optimizations -
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/// like extension and comparison eliminations.
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extern char &PeepholeOptimizerID;
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/// OptimizePHIs - This pass optimizes machine instruction PHIs
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/// to take advantage of opportunities created during DAG legalization.
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extern char &OptimizePHIsID;
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/// StackSlotColoring - This pass performs stack slot coloring.
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extern char &StackSlotColoringID;
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/// This pass lays out funclets contiguously.
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extern char &FuncletLayoutID;
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/// This pass inserts the XRay instrumentation sleds if they are supported by
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/// the target platform.
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extern char &XRayInstrumentationID;
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/// This pass inserts FEntry calls
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extern char &FEntryInserterID;
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/// This pass implements the "patchable-function" attribute.
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extern char &PatchableFunctionID;
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/// createStackProtectorPass - This pass adds stack protectors to functions.
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///
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FunctionPass *createStackProtectorPass();
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/// createMachineVerifierPass - This pass verifies cenerated machine code
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/// instructions for correctness.
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///
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FunctionPass *createMachineVerifierPass(const std::string& Banner);
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/// createDwarfEHPass - This pass mulches exception handling code into a form
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/// adapted to code generation. Required if using dwarf exception handling.
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FunctionPass *createDwarfEHPass(CodeGenOpt::Level OptLevel);
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/// createWinEHPass - Prepares personality functions used by MSVC on Windows,
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/// in addition to the Itanium LSDA based personalities.
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FunctionPass *createWinEHPass(bool DemoteCatchSwitchPHIOnly = false);
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/// createSjLjEHPreparePass - This pass adapts exception handling code to use
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/// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
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///
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FunctionPass *createSjLjEHPreparePass(const TargetMachine *TM);
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/// createWasmEHPass - This pass adapts exception handling code to use
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/// WebAssembly's exception handling scheme.
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FunctionPass *createWasmEHPass();
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/// LocalStackSlotAllocation - This pass assigns local frame indices to stack
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/// slots relative to one another and allocates base registers to access them
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/// when it is estimated by the target to be out of range of normal frame
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/// pointer or stack pointer index addressing.
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extern char &LocalStackSlotAllocationID;
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/// This pass expands pseudo-instructions, reserves registers and adjusts
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/// machine frame information.
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extern char &FinalizeISelID;
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/// UnpackMachineBundles - This pass unpack machine instruction bundles.
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extern char &UnpackMachineBundlesID;
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FunctionPass *
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createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor);
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/// FinalizeMachineBundles - This pass finalize machine instruction
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/// bundles (created earlier, e.g. during pre-RA scheduling).
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extern char &FinalizeMachineBundlesID;
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/// StackMapLiveness - This pass analyses the register live-out set of
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/// stackmap/patchpoint intrinsics and attaches the calculated information to
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/// the intrinsic for later emission to the StackMap.
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extern char &StackMapLivenessID;
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/// LiveDebugValues pass
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extern char &LiveDebugValuesID;
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/// createJumpInstrTables - This pass creates jump-instruction tables.
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ModulePass *createJumpInstrTablesPass();
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/// InterleavedAccess Pass - This pass identifies and matches interleaved
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/// memory accesses to target specific intrinsics.
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///
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FunctionPass *createInterleavedAccessPass();
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/// InterleavedLoadCombines Pass - This pass identifies interleaved loads and
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/// combines them into wide loads detectable by InterleavedAccessPass
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///
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FunctionPass *createInterleavedLoadCombinePass();
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/// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
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/// TLS variables for the emulated TLS model.
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///
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ModulePass *createLowerEmuTLSPass();
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/// This pass lowers the \@llvm.load.relative and \@llvm.objc.* intrinsics to
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/// instructions. This is unsafe to do earlier because a pass may combine the
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/// constant initializer into the load, which may result in an overflowing
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/// evaluation.
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ModulePass *createPreISelIntrinsicLoweringPass();
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/// GlobalMerge - This pass merges internal (by default) globals into structs
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/// to enable reuse of a base pointer by indexed addressing modes.
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/// It can also be configured to focus on size optimizations only.
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///
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Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
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bool OnlyOptimizeForSize = false,
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bool MergeExternalByDefault = false);
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/// This pass splits the stack into a safe stack and an unsafe stack to
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/// protect against stack-based overflow vulnerabilities.
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FunctionPass *createSafeStackPass();
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/// This pass detects subregister lanes in a virtual register that are used
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/// independently of other lanes and splits them into separate virtual
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/// registers.
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extern char &RenameIndependentSubregsID;
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/// This pass is executed POST-RA to collect which physical registers are
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/// preserved by given machine function.
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FunctionPass *createRegUsageInfoCollector();
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/// Return a MachineFunction pass that identifies call sites
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/// and propagates register usage information of callee to caller
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/// if available with PysicalRegisterUsageInfo pass.
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FunctionPass *createRegUsageInfoPropPass();
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/// This pass performs software pipelining on machine instructions.
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extern char &MachinePipelinerID;
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/// This pass frees the memory occupied by the MachineFunction.
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FunctionPass *createFreeMachineFunctionPass();
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/// This pass performs outlining on machine instructions directly before
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/// printing assembly.
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ModulePass *createMachineOutlinerPass(bool RunOnAllFunctions = true);
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/// This pass expands the experimental reduction intrinsics into sequences of
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/// shuffles.
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FunctionPass *createExpandReductionsPass();
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// This pass expands memcmp() to load/stores.
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FunctionPass *createExpandMemCmpPass();
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/// Creates Break False Dependencies pass. \see BreakFalseDeps.cpp
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FunctionPass *createBreakFalseDeps();
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// This pass expands indirectbr instructions.
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FunctionPass *createIndirectBrExpandPass();
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/// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp
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FunctionPass *createCFIInstrInserter();
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/// Creates CFGuard longjmp target identification pass.
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/// \see CFGuardLongjmp.cpp
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FunctionPass *createCFGuardLongjmpPass();
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/// Create Hardware Loop pass. \see HardwareLoops.cpp
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FunctionPass *createHardwareLoopsPass();
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/// This pass inserts pseudo probe annotation for callsite profiling.
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FunctionPass *createPseudoProbeInserter();
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/// Create IR Type Promotion pass. \see TypePromotion.cpp
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FunctionPass *createTypePromotionPass();
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/// Creates MIR Debugify pass. \see MachineDebugify.cpp
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ModulePass *createDebugifyMachineModulePass();
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/// Creates MIR Strip Debug pass. \see MachineStripDebug.cpp
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/// If OnlyDebugified is true then it will only strip debug info if it was
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/// added by a Debugify pass. The module will be left unchanged if the debug
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/// info was generated by another source such as clang.
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ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified);
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/// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp
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ModulePass *createCheckDebugMachineModulePass();
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/// The pass fixups statepoint machine instruction to replace usage of
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/// caller saved registers with stack slots.
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extern char &FixupStatepointCallerSavedID;
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/// The pass transform load/store <256 x i32> to AMX load/store intrinsics
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/// or split the data to two <128 x i32>.
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FunctionPass *createX86LowerAMXTypePass();
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} // End llvm namespace
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#endif
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