106 lines
2.8 KiB
YAML
106 lines
2.8 KiB
YAML
# RUN: llc -mtriple=aarch64-linux-gnu -verify-machineinstrs -run-pass=aarch64-ldst-opt %s -o - | FileCheck %s
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#
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# When the AArch64 Load Store Optimization pass tries to convert load instructions
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# into a ldp instruction, and when the base register of the second ldr instruction
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# has been modified in between these two ldr instructions, the conversion should not
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# occur.
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#
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# For example, for the following pattern:
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# ldr x9 [x10]
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# ldr x10 [x8]
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# ldr x10 [x10, 8],
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# the first and third ldr instructions cannot be converted to ldp x9, x10, [x10].
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#
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# CHECK-LABEL: name: ldr-modified-baseReg-no-ldp1
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# CHECK-NOT: LDP
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# CHECK: $x9 = LDRXui $x10, 1 :: (load 8)
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# CHECK: $x10 = LDURXi $x8, 1 :: (load 8)
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# CHECK: $x10 = LDRXui $x10, 0 :: (load 8)
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# CHECK: RET
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---
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name: ldr-modified-baseReg-no-ldp1
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x8, $x10
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$x9 = LDRXui $x10, 1 :: (load 8)
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$x10 = LDURXi $x8, 1 :: (load 8)
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$x10 = LDRXui $x10, 0 :: (load 8)
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RET undef $lr, implicit undef $w0
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...
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# CHECK-LABEL: name: str-modified-baseReg-no-stp1
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# CHECK-NOT: STP
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# CHECK: STRXui $x9, $x10, 1 :: (store 8)
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# CHECK: $x10 = LDRXui $x8, 0 :: (load 8)
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# CHECK: STRXui $x10, $x10, 0 :: (store 8)
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# CHECK: RET
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---
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name: str-modified-baseReg-no-stp1
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x9, $x8, $x10
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STRXui $x9, $x10, 1 :: (store 8)
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$x10 = LDRXui $x8, 0 :: (load 8)
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STRXui $x10, $x10, 0 :: (store 8)
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RET undef $lr, implicit undef $w0
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...
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# CHECK-LABEL: name: ldr-modified-baseReg-no-ldp2
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# CHECK-NOT: LDP
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# CHECK: $x9 = LDRXui $x10, 1 :: (load 8)
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# CHECK: $x10 = MOVi64imm 13
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# CHECK: $x11 = LDRXui $x10, 0 :: (load 8)
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# CHECK: RET
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---
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name: ldr-modified-baseReg-no-ldp2
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x8, $x10
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$x9 = LDRXui $x10, 1 :: (load 8)
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$x10 = MOVi64imm 13
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$x11 = LDRXui $x10, 0 :: (load 8)
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RET undef $lr, implicit undef $w0
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...
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# CHECK-LABEL: name: ldr-modified-baseReg-no-ldp3
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# CHECK-NOT: LDP
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# CHECK: $x9 = LDRXui $x10, 1 :: (load 8)
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# CHECK: $x10 = ADDXri $x8, $x11, 0
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# CHECK: $x12 = LDRXui $x10, 0 :: (load 8)
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# CHECK: RET
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---
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name: ldr-modified-baseReg-no-ldp3
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x8, $x10, $x11
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$x9 = LDRXui $x10, 1 :: (load 8)
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$x10 = ADDXri $x8, $x11, 0
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$x12 = LDRXui $x10, 0 :: (load 8)
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RET undef $lr, implicit undef $w0
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...
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# CHECK-LABEL: name: ldr-modified-baseAddr-convert-to-ldp
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# CHECK: $x12, $x9 = LDPXi $x10, 0 :: (load 8)
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# CHECK: STRXui $x11, $x10, 1 :: (store 8)
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# CHECK: RET
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---
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name: ldr-modified-baseAddr-convert-to-ldp
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x8, $x10, $x11
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$x9 = LDRXui $x10, 1 :: (load 8)
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STRXui $x11, $x10, 1 :: (store 8)
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$x12 = LDRXui $x10, 0 :: (load 8)
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RET undef $lr, implicit undef $w0
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...
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