172 lines
5.4 KiB
YAML
172 lines
5.4 KiB
YAML
# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=early-ifcvt -verify-machineinstrs %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "arm64-apple-ios13.3.0"
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define hidden void @phi_operands_regclasses_different() #0 {
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entry:
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br i1 undef, label %if.then139.i, label %if.else142.i
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if.then139.i: ; preds = %entry
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%0 = load double, double* undef, align 8
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br label %if.end161.i
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if.else142.i: ; preds = %entry
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%tobool154.i = icmp eq i8 undef, 0
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br i1 %tobool154.i, label %if.then155.i, label %if.end161.i
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if.then155.i: ; preds = %if.else142.i
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%add158.i = fadd double undef, 0.000000e+00
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br label %if.end161.i
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if.end161.i: ; preds = %if.then155.i, %if.else142.i, %if.then139.i
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%y2.0.i = phi double [ %0, %if.then139.i ], [ 0.000000e+00, %if.else142.i ], [ 0.000000e+00, %if.then155.i ]
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%add169.i = fadd double 0.000000e+00, %y2.0.i
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%1 = fmul double undef, %add169.i
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%add174.i = fsub double undef, %1
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%2 = call double @llvm.fabs.f64(double %add174.i) #2
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%cmp.i516.i = fcmp olt double %2, 0x3BC79CA10C924223
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br i1 %cmp.i516.i, label %if.then.i.i, label %if.end9.i.i
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if.then.i.i: ; preds = %if.end161.i
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%3 = call double @llvm.fabs.f64(double undef) #2
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unreachable
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if.end9.i.i: ; preds = %if.end161.i
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ret void
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}
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declare double @llvm.fabs.f64(double) #1
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declare void @llvm.stackprotector(i8*, i8**) #2
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attributes #0 = { "target-cpu"="apple-a7" }
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attributes #1 = { nounwind readnone speculatable willreturn }
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attributes #2 = { nounwind }
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!llvm.ident = !{!0}
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!0 = !{!"clang"}
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...
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---
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name: phi_operands_regclasses_different
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alignment: 4
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exposesReturnsTwice: false
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legalized: true
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regBankSelected: true
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selected: true
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failedISel: false
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tracksRegLiveness: true
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hasWinCFI: false
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registers:
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- { id: 0, class: gpr32, preferred-register: '' }
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- { id: 1, class: _, preferred-register: '' }
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- { id: 2, class: _, preferred-register: '' }
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- { id: 3, class: gpr, preferred-register: '' }
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- { id: 4, class: gpr64, preferred-register: '' }
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- { id: 5, class: fpr, preferred-register: '' }
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- { id: 6, class: _, preferred-register: '' }
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- { id: 7, class: gpr64, preferred-register: '' }
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- { id: 8, class: gpr64common, preferred-register: '' }
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- { id: 9, class: gpr64, preferred-register: '' }
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- { id: 10, class: fpr64, preferred-register: '' }
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- { id: 11, class: fpr64, preferred-register: '' }
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- { id: 12, class: fpr, preferred-register: '' }
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- { id: 13, class: fpr64, preferred-register: '' }
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- { id: 14, class: fpr, preferred-register: '' }
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- { id: 15, class: gpr32, preferred-register: '' }
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- { id: 16, class: _, preferred-register: '' }
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- { id: 17, class: gpr32, preferred-register: '' }
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- { id: 18, class: gpr32, preferred-register: '' }
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- { id: 19, class: gpr32, preferred-register: '' }
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- { id: 20, class: gpr, preferred-register: '' }
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- { id: 21, class: fpr64, preferred-register: '' }
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- { id: 22, class: fpr64, preferred-register: '' }
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- { id: 23, class: fpr64, preferred-register: '' }
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- { id: 24, class: fpr64, preferred-register: '' }
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- { id: 25, class: fpr64, preferred-register: '' }
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- { id: 26, class: fpr64, preferred-register: '' }
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- { id: 27, class: fpr64, preferred-register: '' }
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- { id: 28, class: gpr64, preferred-register: '' }
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liveins: []
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 1
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adjustsStack: false
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hasCalls: false
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stackProtector: ''
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maxCallFrameSize: 0
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cvBytesOfCalleeSavedRegisters: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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localFrameSize: 0
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savePoint: ''
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restorePoint: ''
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fixedStack: []
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stack: []
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callSites: []
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constants: []
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machineFunctionInfo: {}
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body: |
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; Here we check that we don't ifcvt to a CSEL that uses GPRs, because
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; some operands to the PHI have the fpr64 regclass.
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; CHECK-LABEL: name: phi_operands_regclasses_different
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; CHECK-NOT: CSELXr
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bb.1.entry:
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successors: %bb.2(0x40000000), %bb.3(0x40000000)
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%0:gpr32 = IMPLICIT_DEF
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%4:gpr64 = IMPLICIT_DEF
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%8:gpr64common = IMPLICIT_DEF
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TBNZW %0, 0, %bb.2
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B %bb.3
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bb.2.if.then139.i:
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successors: %bb.5(0x80000000)
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%7:gpr64 = LDRXui %8, 0 :: (load 8 from `double* undef`)
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B %bb.5
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bb.3.if.else142.i:
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successors: %bb.4(0x40000000), %bb.5(0x40000000)
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%26:fpr64 = FMOVD0
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%19:gpr32 = COPY $wzr
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CBNZW %19, %bb.5
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bb.4.if.then155.i:
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successors: %bb.5(0x80000000)
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%27:fpr64 = FMOVD0
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bb.5.if.end161.i:
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successors: %bb.6(0x40000000), %bb.7(0x40000000)
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%9:gpr64 = PHI %7, %bb.2, %26, %bb.3, %27, %bb.4
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%21:fpr64 = COPY %9
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%25:fpr64 = FMOVD0
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%10:fpr64 = FADDDrr %25, %21
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%22:fpr64 = COPY %4
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%11:fpr64 = FMULDrr %22, %10
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%23:fpr64 = COPY %4
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%13:fpr64 = FABD64 %23, %11
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%28:gpr64 = MOVi64imm 4307583784117748259
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%24:fpr64 = COPY %28
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FCMPDrr %13, %24, implicit-def $nzcv
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%17:gpr32 = CSINCWr $wzr, $wzr, 5, implicit $nzcv
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TBNZW %17, 0, %bb.6
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B %bb.7
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bb.6.if.then.i.i:
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successors:
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bb.7.if.end9.i.i:
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RET_ReallyLR
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...
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