105 lines
3.4 KiB
LLVM
105 lines
3.4 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck --check-prefixes=GCN,FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck --check-prefixes=GCN,FUNC %s
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; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefixes=EG,FUNC %s
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; RUN: llc -march=r600 -mcpu=cayman < %s | FileCheck --check-prefixes=EG,FUNC %s
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@b = internal addrspace(4) constant [1 x i16] [ i16 7 ], align 2
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@float_gv = internal unnamed_addr addrspace(4) constant [5 x float] [float 0.0, float 1.0, float 2.0, float 3.0, float 4.0], align 4
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; FUNC-LABEL: {{^}}float:
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; GCN: s_load_dword
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; EG: VTX_READ_32
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; EG: @float_gv
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; EG-NOT: MOVA_INT
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; EG-NOT: MOV
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define amdgpu_kernel void @float(float addrspace(1)* %out, i32 %index) {
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entry:
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%0 = getelementptr inbounds [5 x float], [5 x float] addrspace(4)* @float_gv, i32 0, i32 %index
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%1 = load float, float addrspace(4)* %0
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store float %1, float addrspace(1)* %out
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ret void
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}
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@i32_gv = internal unnamed_addr addrspace(4) constant [5 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4], align 4
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; FUNC-LABEL: {{^}}i32:
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; GCN: s_load_dword
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; EG: VTX_READ_32
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; EG: @i32_gv
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; EG-NOT: MOVA_INT
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; EG-NOT: MOV
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define amdgpu_kernel void @i32(i32 addrspace(1)* %out, i32 %index) {
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entry:
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%0 = getelementptr inbounds [5 x i32], [5 x i32] addrspace(4)* @i32_gv, i32 0, i32 %index
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%1 = load i32, i32 addrspace(4)* %0
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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%struct.foo = type { float, [5 x i32] }
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@struct_foo_gv = internal unnamed_addr addrspace(4) constant [1 x %struct.foo] [ %struct.foo { float 16.0, [5 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4] } ]
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; FUNC-LABEL: {{^}}struct_foo_gv_load:
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; GCN: s_load_dword
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; EG: VTX_READ_32
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; EG: @struct_foo_gv
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; EG-NOT: MOVA_INT
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; EG-NOT: MOV
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define amdgpu_kernel void @struct_foo_gv_load(i32 addrspace(1)* %out, i32 %index) {
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%gep = getelementptr inbounds [1 x %struct.foo], [1 x %struct.foo] addrspace(4)* @struct_foo_gv, i32 0, i32 0, i32 1, i32 %index
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%load = load i32, i32 addrspace(4)* %gep, align 4
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store i32 %load, i32 addrspace(1)* %out, align 4
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ret void
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}
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@array_v1_gv = internal addrspace(4) constant [4 x <1 x i32>] [ <1 x i32> <i32 1>,
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<1 x i32> <i32 2>,
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<1 x i32> <i32 3>,
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<1 x i32> <i32 4> ]
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; FUNC-LABEL: {{^}}array_v1_gv_load:
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; GCN: s_load_dword
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; EG: VTX_READ_32
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; EG: @array_v1_gv
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; EG-NOT: MOVA_INT
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; EG-NOT: MOV
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define amdgpu_kernel void @array_v1_gv_load(<1 x i32> addrspace(1)* %out, i32 %index) {
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%gep = getelementptr inbounds [4 x <1 x i32>], [4 x <1 x i32>] addrspace(4)* @array_v1_gv, i32 0, i32 %index
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%load = load <1 x i32>, <1 x i32> addrspace(4)* %gep, align 4
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store <1 x i32> %load, <1 x i32> addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}gv_addressing_in_branch:
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; EG: VTX_READ_32
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; EG: @float_gv
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; EG-NOT: MOVA_INT
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define amdgpu_kernel void @gv_addressing_in_branch(float addrspace(1)* %out, i32 %index, i32 %a) {
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entry:
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%0 = icmp eq i32 0, %a
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br i1 %0, label %if, label %else
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if:
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%1 = getelementptr inbounds [5 x float], [5 x float] addrspace(4)* @float_gv, i32 0, i32 %index
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%2 = load float, float addrspace(4)* %1
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store float %2, float addrspace(1)* %out
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br label %endif
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else:
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store float 1.0, float addrspace(1)* %out
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br label %endif
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endif:
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ret void
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}
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