207 lines
7.8 KiB
LLVM
207 lines
7.8 KiB
LLVM
; RUN: llc -march=r600 -mcpu=juniper < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; === WIDTH ==================================================================
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; 9 implicit args = 9 dwords to first image argument.
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; First width at dword index 9+1 -> KC0[2].Z
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; FUNC-LABEL: {{^}}width_2d:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV * [[VAL]], KC0[2].Z
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define amdgpu_kernel void @width_2d (%opencl.image2d_t addrspace(1)* %in,
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i32 addrspace(1)* %out) {
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entry:
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%0 = call [3 x i32] @llvm.OpenCL.image.get.size.2d(
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%opencl.image2d_t addrspace(1)* %in) #0
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%1 = extractvalue [3 x i32] %0, 0
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}width_3d:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV * [[VAL]], KC0[2].Z
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define amdgpu_kernel void @width_3d (%opencl.image3d_t addrspace(1)* %in,
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i32 addrspace(1)* %out) {
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entry:
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%0 = call [3 x i32] @llvm.OpenCL.image.get.size.3d(
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%opencl.image3d_t addrspace(1)* %in) #0
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%1 = extractvalue [3 x i32] %0, 0
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; === HEIGHT =================================================================
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; First height at dword index 9+2 -> KC0[2].W
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; FUNC-LABEL: {{^}}height_2d:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV * [[VAL]], KC0[2].W
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define amdgpu_kernel void @height_2d (%opencl.image2d_t addrspace(1)* %in,
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i32 addrspace(1)* %out) {
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entry:
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%0 = call [3 x i32] @llvm.OpenCL.image.get.size.2d(
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%opencl.image2d_t addrspace(1)* %in) #0
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%1 = extractvalue [3 x i32] %0, 1
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}height_3d:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV * [[VAL]], KC0[2].W
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define amdgpu_kernel void @height_3d (%opencl.image3d_t addrspace(1)* %in,
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i32 addrspace(1)* %out) {
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entry:
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%0 = call [3 x i32] @llvm.OpenCL.image.get.size.3d(
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%opencl.image3d_t addrspace(1)* %in) #0
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%1 = extractvalue [3 x i32] %0, 1
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; === DEPTH ==================================================================
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; First depth at dword index 9+3 -> KC0[3].X
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; FUNC-LABEL: {{^}}depth_3d:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV * [[VAL]], KC0[3].X
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define amdgpu_kernel void @depth_3d (%opencl.image3d_t addrspace(1)* %in,
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i32 addrspace(1)* %out) {
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entry:
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%0 = call [3 x i32] @llvm.OpenCL.image.get.size.3d(
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%opencl.image3d_t addrspace(1)* %in) #0
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%1 = extractvalue [3 x i32] %0, 2
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; === CHANNEL DATA TYPE ======================================================
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; First channel data type at dword index 9+4 -> KC0[3].Y
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; FUNC-LABEL: {{^}}data_type_2d:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV * [[VAL]], KC0[3].Y
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define amdgpu_kernel void @data_type_2d (%opencl.image2d_t addrspace(1)* %in,
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i32 addrspace(1)* %out) {
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entry:
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%0 = call [2 x i32] @llvm.OpenCL.image.get.format.2d(
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%opencl.image2d_t addrspace(1)* %in) #0
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%1 = extractvalue [2 x i32] %0, 0
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}data_type_3d:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV * [[VAL]], KC0[3].Y
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define amdgpu_kernel void @data_type_3d (%opencl.image3d_t addrspace(1)* %in,
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i32 addrspace(1)* %out) {
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entry:
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%0 = call [2 x i32] @llvm.OpenCL.image.get.format.3d(
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%opencl.image3d_t addrspace(1)* %in) #0
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%1 = extractvalue [2 x i32] %0, 0
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; === CHANNEL ORDER ==========================================================
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; First channel order at dword index 9+5 -> KC0[3].Z
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; FUNC-LABEL: {{^}}channel_order_2d:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV * [[VAL]], KC0[3].Z
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define amdgpu_kernel void @channel_order_2d (%opencl.image2d_t addrspace(1)* %in,
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i32 addrspace(1)* %out) {
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entry:
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%0 = call [2 x i32] @llvm.OpenCL.image.get.format.2d(
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%opencl.image2d_t addrspace(1)* %in) #0
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%1 = extractvalue [2 x i32] %0, 1
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}channel_order_3d:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV * [[VAL]], KC0[3].Z
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define amdgpu_kernel void @channel_order_3d (%opencl.image3d_t addrspace(1)* %in,
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i32 addrspace(1)* %out) {
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entry:
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%0 = call [2 x i32] @llvm.OpenCL.image.get.format.3d(
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%opencl.image3d_t addrspace(1)* %in) #0
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%1 = extractvalue [2 x i32] %0, 1
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; === 2ND IMAGE ==============================================================
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; 9 implicit args + 2 explicit args + 5 implicit args for 1st image argument
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; = 16 dwords to 2nd image argument.
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; Height of the second image is at 16+2 -> KC0[4].Z
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;
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; FUNC-LABEL: {{^}}image_arg_2nd:
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; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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; EG: MOV * [[VAL]], KC0[4].Z
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define amdgpu_kernel void @image_arg_2nd (%opencl.image3d_t addrspace(1)* %in1,
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i32 %x,
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%opencl.image2d_t addrspace(1)* %in2,
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i32 addrspace(1)* %out) {
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entry:
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%0 = call [3 x i32] @llvm.OpenCL.image.get.size.2d(
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%opencl.image2d_t addrspace(1)* %in2) #0
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%1 = extractvalue [3 x i32] %0, 1
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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%opencl.image2d_t = type opaque
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%opencl.image3d_t = type opaque
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declare [3 x i32] @llvm.OpenCL.image.get.size.2d(%opencl.image2d_t addrspace(1)*) #0
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declare [3 x i32] @llvm.OpenCL.image.get.size.3d(%opencl.image3d_t addrspace(1)*) #0
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declare [2 x i32] @llvm.OpenCL.image.get.format.2d(%opencl.image2d_t addrspace(1)*) #0
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declare [2 x i32] @llvm.OpenCL.image.get.format.3d(%opencl.image3d_t addrspace(1)*) #0
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attributes #0 = { readnone }
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!opencl.kernels = !{!0, !1, !2, !3, !4, !5, !6, !7, !8, !9}
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!0 = !{void (%opencl.image2d_t addrspace(1)*, i32 addrspace(1)*)* @width_2d,
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!10, !20, !30, !40, !50}
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!1 = !{void (%opencl.image3d_t addrspace(1)*, i32 addrspace(1)*)* @width_3d,
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!10, !21, !31, !41, !50}
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!2 = !{void (%opencl.image2d_t addrspace(1)*, i32 addrspace(1)*)* @height_2d,
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!10, !20, !30, !40, !50}
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!3 = !{void (%opencl.image3d_t addrspace(1)*, i32 addrspace(1)*)* @height_3d,
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!10, !21, !31, !41, !50}
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!4 = !{void (%opencl.image3d_t addrspace(1)*, i32 addrspace(1)*)* @depth_3d,
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!10, !21, !31, !41, !50}
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!5 = !{void (%opencl.image2d_t addrspace(1)*, i32 addrspace(1)*)* @data_type_2d,
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!10, !20, !30, !40, !50}
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!6 = !{void (%opencl.image3d_t addrspace(1)*, i32 addrspace(1)*)* @data_type_3d,
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!10, !21, !31, !41, !50}
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!7 = !{void (%opencl.image2d_t addrspace(1)*, i32 addrspace(1)*)* @channel_order_2d,
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!10, !20, !30, !40, !50}
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!8 = !{void (%opencl.image3d_t addrspace(1)*, i32 addrspace(1)*)* @channel_order_3d,
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!10, !21, !31, !41, !50}
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!9 = !{void (%opencl.image3d_t addrspace(1)*, i32, %opencl.image2d_t addrspace(1)*,
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i32 addrspace(1)*)* @image_arg_2nd, !12, !22, !32, !42, !52}
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!10 = !{!"kernel_arg_addr_space", i32 1, i32 1}
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!20 = !{!"kernel_arg_access_qual", !"read_only", !"none"}
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!21 = !{!"kernel_arg_access_qual", !"read_only", !"none"}
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!30 = !{!"kernel_arg_type", !"image2d_t", !"int*"}
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!31 = !{!"kernel_arg_type", !"image3d_t", !"int*"}
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!40 = !{!"kernel_arg_base_type", !"image2d_t", !"int*"}
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!41 = !{!"kernel_arg_base_type", !"image3d_t", !"int*"}
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!50 = !{!"kernel_arg_type_qual", !"", !""}
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!12 = !{!"kernel_arg_addr_space", i32 1, i32 0, i32 1, i32 1}
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!22 = !{!"kernel_arg_access_qual", !"read_only", !"none", !"write_only", !"none"}
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!32 = !{!"kernel_arg_type", !"image3d_t", !"sampler_t", !"image2d_t", !"int*"}
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!42 = !{!"kernel_arg_base_type", !"image3d_t", !"sampler_t", !"image2d_t", !"int*"}
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!52 = !{!"kernel_arg_type_qual", !"", !"", !"", !""}
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