249 lines
10 KiB
YAML
249 lines
10 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs -run-pass=si-lower-control-flow -o - %s | FileCheck %s
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# Test si-lower-control-flow insertion points when other terminator
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# instructions are present besides the control flow pseudo and a
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# branch.
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# There's another terminator instruction between SI_IF and
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# S_BRANCH. The S_CBRANCH_EXECZ should be inserted immediately before
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# S_BRANCH.
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---
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name: other_terminator_sbranch_after_si_if
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: other_terminator_sbranch_after_si_if
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: liveins: $vgpr0, $vgpr1, $sgpr4_sgpr5
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; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY $sgpr4_sgpr5
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; CHECK: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 0, [[COPY]], implicit $exec
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; CHECK: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
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; CHECK: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_EQ_U32_e64_]], implicit-def dead $scc
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; CHECK: [[S_XOR_B64_:%[0-9]+]]:sreg_64_xexec = S_XOR_B64 [[S_AND_B64_]], [[COPY2]], implicit-def dead $scc
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; CHECK: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
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; CHECK: [[S_MOV_B64_term:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term killed [[COPY1]], implicit $exec
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; CHECK: S_CBRANCH_EXECZ %bb.1, implicit $exec
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; CHECK: S_BRANCH %bb.2
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; CHECK: bb.1:
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; CHECK: successors: %bb.2(0x80000000)
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; CHECK: S_BRANCH %bb.2
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; CHECK: bb.2:
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; CHECK: S_ENDPGM 0, implicit [[S_MOV_B64_term]]
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bb.0:
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successors: %bb.2, %bb.1
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liveins: $vgpr0, $vgpr1, $sgpr4_sgpr5
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%0:vgpr_32 = COPY killed $vgpr0
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%1:sreg_64_xexec = COPY $sgpr4_sgpr5
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%2:sreg_64_xexec = V_CMP_EQ_U32_e64 0, %0, implicit $exec
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%3:sreg_64_xexec = SI_IF %2, %bb.1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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%4:sreg_64_xexec = S_MOV_B64_term killed %1, implicit $exec
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S_BRANCH %bb.2
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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S_ENDPGM 0, implicit %4
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...
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# S_CBRANCH_EXECZ should be inserted after the other terminator
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---
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name: other_terminator_fallthrough_after_si_if
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: other_terminator_fallthrough_after_si_if
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: liveins: $vgpr0, $vgpr1, $sgpr4_sgpr5
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; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY $sgpr4_sgpr5
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; CHECK: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 0, [[COPY]], implicit $exec
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; CHECK: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
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; CHECK: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_EQ_U32_e64_]], implicit-def dead $scc
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; CHECK: [[S_XOR_B64_:%[0-9]+]]:sreg_64_xexec = S_XOR_B64 [[S_AND_B64_]], [[COPY2]], implicit-def dead $scc
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; CHECK: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
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; CHECK: [[S_MOV_B64_term:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term killed [[COPY1]], implicit $exec
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; CHECK: S_CBRANCH_EXECZ %bb.2, implicit $exec
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; CHECK: bb.1:
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; CHECK: successors: %bb.2(0x80000000)
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; CHECK: S_BRANCH %bb.2
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; CHECK: bb.2:
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; CHECK: S_ENDPGM 0, implicit [[S_MOV_B64_term]]
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bb.0:
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successors: %bb.2, %bb.1
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liveins: $vgpr0, $vgpr1, $sgpr4_sgpr5
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%0:vgpr_32 = COPY killed $vgpr0
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%1:sreg_64_xexec = COPY $sgpr4_sgpr5
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%2:sreg_64_xexec = V_CMP_EQ_U32_e64 0, %0, implicit $exec
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%3:sreg_64_xexec = SI_IF %2, %bb.2, implicit-def $exec, implicit-def dead $scc, implicit $exec
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%4:sreg_64_xexec = S_MOV_B64_term killed %1, implicit $exec
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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S_ENDPGM 0, implicit %4
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...
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---
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name: other_terminator_sbranch_after_si_else
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: other_terminator_sbranch_after_si_else
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: liveins: $vgpr0, $vgpr1, $sgpr4_sgpr5
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; CHECK: [[S_OR_SAVEEXEC_B64_:%[0-9]+]]:sreg_64 = S_OR_SAVEEXEC_B64 %2, implicit-def $exec, implicit-def $scc, implicit $exec
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; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY $sgpr4_sgpr5
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; CHECK: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 0, [[COPY]], implicit $exec
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; CHECK: [[S_AND_B64_:%[0-9]+]]:sreg_64_xexec = S_AND_B64 $exec, [[S_OR_SAVEEXEC_B64_]], implicit-def $scc
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; CHECK: $exec = S_XOR_B64_term $exec, [[S_AND_B64_]], implicit-def $scc
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; CHECK: [[S_MOV_B64_term:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term killed [[COPY1]], implicit $exec
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; CHECK: S_CBRANCH_EXECZ %bb.1, implicit $exec
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; CHECK: S_BRANCH %bb.2
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; CHECK: bb.1:
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; CHECK: successors: %bb.2(0x80000000)
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; CHECK: S_BRANCH %bb.2
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; CHECK: bb.2:
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; CHECK: S_ENDPGM 0, implicit [[S_MOV_B64_term]]
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bb.0:
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successors: %bb.2, %bb.1
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liveins: $vgpr0, $vgpr1, $sgpr4_sgpr5
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%0:vgpr_32 = COPY killed $vgpr0
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%1:sreg_64_xexec = COPY $sgpr4_sgpr5
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%2:sreg_64_xexec = V_CMP_EQ_U32_e64 0, %0, implicit $exec
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%3:sreg_64_xexec = SI_ELSE %2, %bb.1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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%4:sreg_64_xexec = S_MOV_B64_term killed %1, implicit $exec
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S_BRANCH %bb.2
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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S_ENDPGM 0, implicit %4
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...
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---
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name: other_terminator_sbranch_after_si_loop
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: other_terminator_sbranch_after_si_loop
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: liveins: $vgpr0, $vgpr1, $sgpr4_sgpr5
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; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY $sgpr4_sgpr5
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; CHECK: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 0, [[COPY]], implicit $exec
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; CHECK: $exec = S_ANDN2_B64_term $exec, [[V_CMP_EQ_U32_e64_]], implicit-def $scc
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; CHECK: [[S_MOV_B64_term:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term killed [[COPY1]], implicit $exec
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; CHECK: S_CBRANCH_EXECNZ %bb.1, implicit $exec
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; CHECK: S_BRANCH %bb.2
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; CHECK: bb.1:
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; CHECK: successors: %bb.2(0x80000000)
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; CHECK: S_BRANCH %bb.2
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; CHECK: bb.2:
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; CHECK: S_ENDPGM 0, implicit [[S_MOV_B64_term]]
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bb.0:
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successors: %bb.2, %bb.1
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liveins: $vgpr0, $vgpr1, $sgpr4_sgpr5
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%0:vgpr_32 = COPY killed $vgpr0
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%1:sreg_64_xexec = COPY $sgpr4_sgpr5
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%2:sreg_64_xexec = V_CMP_EQ_U32_e64 0, %0, implicit $exec
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SI_LOOP %2, %bb.1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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%4:sreg_64_xexec = S_MOV_B64_term killed %1, implicit $exec
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S_BRANCH %bb.2
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bb.1:
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S_BRANCH %bb.2
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bb.2:
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S_ENDPGM 0, implicit %4
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...
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# The save exec result register of SI_IF is used by other terminators
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# inserted to behave as a lowered phi. The output register of SI_IF
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# was ignored, and the def was removed, so the S_MOV_B64_term uses
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# would fail the verifier.
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---
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name: si_if_use
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alignment: 1
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legalized: true
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regBankSelected: true
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selected: true
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: si_if_use
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; CHECK: liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
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; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:vgpr_32 = COPY killed $vgpr1
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; CHECK: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 killed [[COPY]], killed [[COPY1]], implicit $exec
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; CHECK: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
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; CHECK: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_EQ_U32_e64_]], implicit-def dead $scc
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; CHECK: [[S_XOR_B64_:%[0-9]+]]:sreg_64_xexec = S_XOR_B64 [[S_AND_B64_]], [[COPY2]], implicit-def dead $scc
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; CHECK: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
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; CHECK: [[S_MOV_B64_term:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term [[S_XOR_B64_]], implicit $exec
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; CHECK: [[S_MOV_B64_term1:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term [[S_XOR_B64_]], implicit $exec
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; CHECK: S_CBRANCH_EXECZ %bb.1, implicit $exec
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; CHECK: S_BRANCH %bb.2
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; CHECK: bb.1:
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; CHECK: successors: %bb.2(0x80000000)
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; CHECK: [[COPY3:%[0-9]+]]:sreg_64_xexec = COPY [[S_MOV_B64_term1]]
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; CHECK: dead %7:vgpr_32 = GLOBAL_LOAD_DWORD undef %8:vreg_64, 0, 0, 0, 0, implicit $exec :: (volatile load 4, addrspace 1)
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; CHECK: [[COPY4:%[0-9]+]]:sreg_64_xexec = COPY [[COPY3]]
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; CHECK: bb.2:
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; CHECK: successors: %bb.3(0x80000000)
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; CHECK: [[COPY5:%[0-9]+]]:sreg_64_xexec = COPY [[COPY4]]
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; CHECK: $exec = S_OR_B64_term $exec, killed [[COPY5]], implicit-def $scc
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; CHECK: bb.3:
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; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; CHECK: S_SLEEP 1
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; CHECK: [[COPY6:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
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; CHECK: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY6]], [[V_CMP_EQ_U32_e64_]], implicit-def dead $scc
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; CHECK: [[S_XOR_B64_1:%[0-9]+]]:sreg_64_xexec = S_XOR_B64 [[S_AND_B64_1]], [[COPY6]], implicit-def dead $scc
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; CHECK: $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
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; CHECK: [[S_MOV_B64_term1:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term [[S_XOR_B64_1]], implicit $exec
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; CHECK: [[S_MOV_B64_term2:%[0-9]+]]:sreg_64_xexec = S_MOV_B64_term [[S_XOR_B64_1]], implicit $exec
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; CHECK: S_CBRANCH_EXECZ %bb.1, implicit $exec
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; CHECK: S_BRANCH %bb.2
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bb.0:
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liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
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%0:vgpr_32 = COPY killed $vgpr0
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%1:vgpr_32 = COPY killed $vgpr1
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%3:sreg_64_xexec = V_CMP_EQ_U32_e64 killed %0, killed %1, implicit $exec
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%10:sreg_64_xexec = SI_IF %3, %bb.1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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%14:sreg_64_xexec = S_MOV_B64_term %10, implicit $exec
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%13:sreg_64_xexec = S_MOV_B64_term %10, implicit $exec
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S_BRANCH %bb.2
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bb.1:
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%11:sreg_64_xexec = COPY %13
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dead %6:vgpr_32 = GLOBAL_LOAD_DWORD undef %8:vreg_64, 0, 0, 0, 0, implicit $exec :: (volatile load 4, addrspace 1)
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%14:sreg_64_xexec = COPY %11
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bb.2:
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%12:sreg_64_xexec = COPY %14
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SI_END_CF killed %12, implicit-def $exec, implicit-def dead $scc, implicit $exec
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S_SLEEP 1
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%9:sreg_64_xexec = SI_IF %3, %bb.1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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%14:sreg_64_xexec = S_MOV_B64_term %9, implicit $exec
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%13:sreg_64_xexec = S_MOV_B64_term %9, implicit $exec
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S_BRANCH %bb.2
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...
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