49 lines
2.1 KiB
LLVM
49 lines
2.1 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=MEMTIME -check-prefix=SIVI -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=MEMTIME -check-prefix=SIVI -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=MEMTIME -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GETREG -check-prefix=GCN %s
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declare i64 @llvm.readcyclecounter() #0
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; GCN-LABEL: {{^}}test_readcyclecounter:
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; MEMTIME-DAG: s_memtime s{{\[[0-9]+:[0-9]+\]}}
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; GCN-DAG: s_load_dwordx2
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; GCN-DAG: lgkmcnt
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; MEMTIME: store_dwordx2
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; SIVI-NOT: lgkmcnt
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; MEMTIME: s_memtime s{{\[[0-9]+:[0-9]+\]}}
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; MEMTIME: store_dwordx2
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; GETREG-DAG: v_mov_b32_e32 v[[ZERO:[0-9]+]], 0
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; GETREG-DAG: s_getreg_b32 [[CNT1:s[0-9]+]], hwreg(HW_REG_SHADER_CYCLES, 0, 20)
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; GETREG-DAG: v_mov_b32_e32 v[[VCNT1:[0-9]+]], [[CNT1]]
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; GETREG: global_store_dwordx2 v{{.+}}, v{{\[}}[[VCNT1]]:[[ZERO]]]
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; GETREG: s_getreg_b32 [[CNT2:s[0-9]+]], hwreg(HW_REG_SHADER_CYCLES, 0, 20)
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; GETREG: v_mov_b32_e32 v[[VCNT2:[0-9]+]], [[CNT2]]
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; GETREG: global_store_dwordx2 v{{.+}}, v{{\[}}[[VCNT2]]:[[ZERO]]]
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define amdgpu_kernel void @test_readcyclecounter(i64 addrspace(1)* %out) #0 {
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%cycle0 = call i64 @llvm.readcyclecounter()
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store volatile i64 %cycle0, i64 addrspace(1)* %out
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%cycle1 = call i64 @llvm.readcyclecounter()
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store volatile i64 %cycle1, i64 addrspace(1)* %out
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ret void
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}
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; This test used to crash in ScheduleDAG.
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;
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; GCN-LABEL: {{^}}test_readcyclecounter_smem:
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; MEMTIME-DAG: s_memtime
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; GCN-DAG: s_load_dword
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; GETREG-DAG: s_getreg_b32 s1, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
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define amdgpu_cs i32 @test_readcyclecounter_smem(i64 addrspace(4)* inreg %in) #0 {
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%cycle0 = call i64 @llvm.readcyclecounter()
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%in.v = load i64, i64 addrspace(4)* %in
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%r.64 = add i64 %cycle0, %in.v
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%r.32 = trunc i64 %r.64 to i32
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ret i32 %r.32
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}
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attributes #0 = { nounwind }
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