llvm-for-llvmta/test/CodeGen/ARM/rotate.ll

20 lines
702 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=thumbv8--linux-gnueabihf | FileCheck %s
;; This used to cause a backend crash about not being able to
;; select ROTL. Make sure if generates the basic VSHL/VSHR.
define <2 x i64> @testcase(<2 x i64>* %in) {
; CHECK-LABEL: testcase:
; CHECK: @ %bb.0:
; CHECK-NEXT: vld1.64 {d16, d17}, [r0]
; CHECK-NEXT: vshl.i64 q9, q8, #56
; CHECK-NEXT: vshr.u64 q8, q8, #8
; CHECK-NEXT: vorr q0, q8, q9
; CHECK-NEXT: bx lr
%1 = load <2 x i64>, <2 x i64>* %in
%2 = lshr <2 x i64> %1, <i64 8, i64 8>
%3 = shl <2 x i64> %1, <i64 56, i64 56>
%4 = or <2 x i64> %2, %3
ret <2 x i64> %4
}