304 lines
7.0 KiB
LLVM
304 lines
7.0 KiB
LLVM
; RUN: llc -mtriple=i686-windows < %s | FileCheck %s
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declare void @addrof_i1(i1*)
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declare void @addrof_i32(i32*)
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declare void @addrof_i64(i64*)
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declare void @addrof_i128(i128*)
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declare void @addrof_i32_x3(i32*, i32*, i32*)
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define void @simple(i32 %x) {
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entry:
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%x.addr = alloca i32
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store i32 %x, i32* %x.addr
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call void @addrof_i32(i32* %x.addr)
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ret void
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}
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; CHECK-LABEL: _simple:
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; CHECK: leal 4(%esp), %[[reg:[^ ]*]]
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; CHECK: pushl %[[reg]]
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; CHECK: calll _addrof_i32
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; CHECK: retl
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; We need to load %x before calling addrof_i32 now because it could mutate %x in
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; place.
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define i32 @use_arg(i32 %x) {
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entry:
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%x.addr = alloca i32
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store i32 %x, i32* %x.addr
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call void @addrof_i32(i32* %x.addr)
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ret i32 %x
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}
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; CHECK-LABEL: _use_arg:
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; CHECK: pushl %[[csr:[^ ]*]]
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; CHECK-DAG: movl 8(%esp), %[[csr]]
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; CHECK-DAG: leal 8(%esp), %[[reg:[^ ]*]]
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; CHECK: pushl %[[reg]]
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; CHECK: calll _addrof_i32
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; CHECK: movl %[[csr]], %eax
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; CHECK: popl %[[csr]]
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; CHECK: retl
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; We won't copy elide for types needing legalization such as i64 or i1.
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define i64 @split_i64(i64 %x) {
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entry:
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%x.addr = alloca i64, align 4
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store i64 %x, i64* %x.addr, align 4
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call void @addrof_i64(i64* %x.addr)
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ret i64 %x
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}
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; CHECK-LABEL: _split_i64:
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; CHECK: pushl %[[csr2:[^ ]*]]
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; CHECK: pushl %[[csr1:[^ ]*]]
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; CHECK-DAG: movl 12(%esp), %[[csr1]]
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; CHECK-DAG: movl 16(%esp), %[[csr2]]
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; CHECK-DAG: leal 12(%esp), %[[reg:[^ ]*]]
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; CHECK: pushl %[[reg]]
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; CHECK: calll _addrof_i64
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; CHECK: addl $4, %esp
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; CHECK-DAG: movl %[[csr1]], %eax
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; CHECK-DAG: movl %[[csr2]], %edx
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; CHECK: popl %[[csr1]]
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; CHECK: popl %[[csr2]]
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; CHECK: retl
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define i1 @i1_arg(i1 %x) {
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%x.addr = alloca i1
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store i1 %x, i1* %x.addr
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call void @addrof_i1(i1* %x.addr)
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ret i1 %x
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}
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; CHECK-LABEL: _i1_arg:
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; CHECK: pushl %ebx
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; CHECK: movb 8(%esp), %bl
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; CHECK: leal 8(%esp), %eax
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; CHECK: pushl %eax
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; CHECK: calll _addrof_i1
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; CHECK: addl $4, %esp
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; CHECK: movl %ebx, %eax
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; CHECK: popl %ebx
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; CHECK: retl
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; We can't copy elide when an i64 is split between registers and memory in a
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; fastcc function.
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define fastcc i64 @fastcc_split_i64(i64* %p, i64 %x) {
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entry:
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%x.addr = alloca i64, align 4
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store i64 %x, i64* %x.addr, align 4
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call void @addrof_i64(i64* %x.addr)
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ret i64 %x
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}
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; CHECK-LABEL: _fastcc_split_i64:
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; CHECK-DAG: movl %edx, %[[r1:[^ ]*]]
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; CHECK-DAG: movl 20(%esp), %[[r2:[^ ]*]]
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; CHECK-DAG: movl %[[r2]], 4(%esp)
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; CHECK-DAG: movl %edx, (%esp)
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; CHECK: movl %esp, %[[reg:[^ ]*]]
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; CHECK: pushl %[[reg]]
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; CHECK: calll _addrof_i64
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; CHECK: retl
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; We can't copy elide when it would reduce the user requested alignment.
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define void @high_alignment(i32 %x) {
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entry:
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%x.p = alloca i32, align 128
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store i32 %x, i32* %x.p
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call void @addrof_i32(i32* %x.p)
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ret void
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}
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; CHECK-LABEL: _high_alignment:
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; CHECK: andl $-128, %esp
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; CHECK: movl 8(%ebp), %[[reg:[^ ]*]]
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; CHECK: movl %[[reg]], (%esp)
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; CHECK: movl %esp, %[[reg:[^ ]*]]
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; CHECK: pushl %[[reg]]
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; CHECK: calll _addrof_i32
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; CHECK: retl
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; We can't copy elide when it would reduce the ABI required alignment.
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; FIXME: We should lower the ABI alignment of i64 on Windows, since MSVC
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; doesn't guarantee it.
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define void @abi_alignment(i64 %x) {
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entry:
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%x.p = alloca i64
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store i64 %x, i64* %x.p
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call void @addrof_i64(i64* %x.p)
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ret void
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}
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; CHECK-LABEL: _abi_alignment:
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; CHECK: andl $-8, %esp
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; CHECK: movl 8(%ebp), %[[reg:[^ ]*]]
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; CHECK: movl %[[reg]], (%esp)
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; CHECK: movl %esp, %[[reg:[^ ]*]]
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; CHECK: pushl %[[reg]]
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; CHECK: calll _addrof_i64
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; CHECK: retl
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; The code we generate for this is unimportant. This is mostly a crash test.
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define void @split_i128(i128* %sret, i128 %x) {
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entry:
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%x.addr = alloca i128
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store i128 %x, i128* %x.addr
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call void @addrof_i128(i128* %x.addr)
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store i128 %x, i128* %sret
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ret void
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}
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; CHECK-LABEL: _split_i128:
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; CHECK: pushl %ebp
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; CHECK: calll _addrof_i128
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; CHECK: retl
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; Check that we load all of x, y, and z before the call.
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define i32 @three_args(i32 %x, i32 %y, i32 %z) {
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entry:
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%z.addr = alloca i32, align 4
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%y.addr = alloca i32, align 4
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%x.addr = alloca i32, align 4
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store i32 %z, i32* %z.addr, align 4
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store i32 %y, i32* %y.addr, align 4
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store i32 %x, i32* %x.addr, align 4
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call void @addrof_i32_x3(i32* %x.addr, i32* %y.addr, i32* %z.addr)
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%s1 = add i32 %x, %y
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%sum = add i32 %s1, %z
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ret i32 %sum
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}
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; CHECK-LABEL: _three_args:
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; CHECK: pushl %[[csr:[^ ]*]]
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; CHECK-DAG: movl {{[0-9]+}}(%esp), %[[csr]]
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; CHECK-DAG: addl {{[0-9]+}}(%esp), %[[csr]]
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; CHECK-DAG: addl {{[0-9]+}}(%esp), %[[csr]]
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; CHECK-DAG: leal 8(%esp), %[[x:[^ ]*]]
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; CHECK-DAG: leal 12(%esp), %[[y:[^ ]*]]
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; CHECK-DAG: leal 16(%esp), %[[z:[^ ]*]]
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; CHECK: pushl %[[z]]
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; CHECK: pushl %[[y]]
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; CHECK: pushl %[[x]]
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; CHECK: calll _addrof_i32_x3
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; CHECK: movl %[[csr]], %eax
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; CHECK: popl %[[csr]]
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; CHECK: retl
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define void @two_args_same_alloca(i32 %x, i32 %y) {
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entry:
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%x.addr = alloca i32
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store i32 %x, i32* %x.addr
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store i32 %y, i32* %x.addr
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call void @addrof_i32(i32* %x.addr)
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ret void
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}
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; CHECK-LABEL: _two_args_same_alloca:
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; CHECK: movl 8(%esp), {{.*}}
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; CHECK: movl {{.*}}, 4(%esp)
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; CHECK: leal 4(%esp), %[[reg:[^ ]*]]
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; CHECK: pushl %[[reg]]
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; CHECK: calll _addrof_i32
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; CHECK: retl
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define void @avoid_byval(i32* byval(i32) %x) {
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entry:
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%x.p.p = alloca i32*
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store i32* %x, i32** %x.p.p
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call void @addrof_i32(i32* %x)
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ret void
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}
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; CHECK-LABEL: _avoid_byval:
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; CHECK: leal {{[0-9]+}}(%esp), %[[reg:[^ ]*]]
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; CHECK: pushl %[[reg]]
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; CHECK: calll _addrof_i32
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; CHECK: retl
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define void @avoid_inalloca(i32* inalloca %x) {
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entry:
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%x.p.p = alloca i32*
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store i32* %x, i32** %x.p.p
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call void @addrof_i32(i32* %x)
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ret void
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}
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; CHECK-LABEL: _avoid_inalloca:
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; CHECK: leal {{[0-9]+}}(%esp), %[[reg:[^ ]*]]
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; CHECK: pushl %[[reg]]
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; CHECK: calll _addrof_i32
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; CHECK: retl
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define void @avoid_preallocated(i32* preallocated(i32) %x) {
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entry:
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%x.p.p = alloca i32*
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store i32* %x, i32** %x.p.p
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call void @addrof_i32(i32* %x)
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ret void
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}
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; CHECK-LABEL: _avoid_preallocated:
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; CHECK: leal {{[0-9]+}}(%esp), %[[reg:[^ ]*]]
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; CHECK: pushl %[[reg]]
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; CHECK: calll _addrof_i32
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; CHECK: retl
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; Don't elide the copy when the alloca is escaped with a store.
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define void @escape_with_store(i32 %x) {
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%x1 = alloca i32
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%x2 = alloca i32*
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store i32* %x1, i32** %x2
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%x3 = load i32*, i32** %x2
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store i32 0, i32* %x3
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store i32 %x, i32* %x1
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call void @addrof_i32(i32* %x1)
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ret void
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}
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; CHECK-LABEL: _escape_with_store:
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; CHECK: movl {{.*}}(%esp), %[[reg:[^ ]*]]
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; CHECK: movl %[[reg]], [[offs:[0-9]*]](%esp)
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; CHECK: calll _addrof_i32
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; This test case exposed issues with the use of TokenFactor.
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define void @sret_and_elide(i32* sret(i32) %sret, i32 %v) {
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%v.p = alloca i32
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store i32 %v, i32* %v.p
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call void @addrof_i32(i32* %v.p)
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store i32 %v, i32* %sret
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ret void
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}
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; CHECK-LABEL: _sret_and_elide:
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; CHECK: pushl
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; CHECK: pushl
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; CHECK: movl 12(%esp), %[[sret:[^ ]*]]
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; CHECK: movl 16(%esp), %[[v:[^ ]*]]
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; CHECK: leal 16(%esp), %[[reg:[^ ]*]]
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; CHECK: pushl %[[reg]]
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; CHECK: calll _addrof_i32
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; CHECK: movl %[[v]], (%[[sret]])
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; CHECK: movl %[[sret]], %eax
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; CHECK: popl
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; CHECK: popl
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; CHECK: retl
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