154 lines
4.2 KiB
LLVM
154 lines
4.2 KiB
LLVM
; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic \
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; RUN: | FileCheck -check-prefix=X86 %s
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; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \
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; RUN: | FileCheck -check-prefix=X64 %s
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; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=i386-linux-android -relocation-model=pic \
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; RUN: | FileCheck -check-prefix=X86 %s
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; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=x86_64-linux-android -relocation-model=pic \
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; RUN: | FileCheck -check-prefix=X64 %s
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; RUN: llc < %s -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic \
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; RUN: | FileCheck -check-prefix=NoEMU %s
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; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \
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; RUN: | FileCheck -check-prefix=NoEMU %s
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; RUN: llc < %s -mcpu=generic -mtriple=i386-linux-android -relocation-model=pic \
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; RUN: | FileCheck -check-prefix=X86 %s
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; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-android -relocation-model=pic \
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; RUN: | FileCheck -check-prefix=X64 %s
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; NoEMU-NOT: __emutls
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; Use my_emutls_get_address like __emutls_get_address.
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@my_emutls_v_xyz = external global i8*, align 4
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declare i8* @my_emutls_get_address(i8*)
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define dso_local i32 @my_get_xyz() {
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; X86-LABEL: my_get_xyz:
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; X86: movl my_emutls_v_xyz@GOT(%ebx), %eax
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; X86-NEXT: movl %eax, (%esp)
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; X86-NEXT: calll my_emutls_get_address@PLT
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; X86-NEXT: movl (%eax), %eax
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; X86-NEXT: addl $8, %esp
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; X86-NEXT: .cfi_def_cfa_offset 8
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; X86-NEXT: popl %ebx
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; X86-NEXT: .cfi_def_cfa_offset 4
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; X86-NEXT: retl
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; X64-LABEL: my_get_xyz:
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; X64: movq my_emutls_v_xyz@GOTPCREL(%rip), %rdi
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; X64-NEXT: callq my_emutls_get_address@PLT
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; X64-NEXT: movl (%rax), %eax
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; X64-NEXT: popq %rcx
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; X64-NEXT: .cfi_def_cfa_offset 8
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; X64-NEXT: retq
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entry:
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%call = call i8* @my_emutls_get_address(i8* bitcast (i8** @my_emutls_v_xyz to i8*))
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%0 = bitcast i8* %call to i32*
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%1 = load i32, i32* %0, align 4
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ret i32 %1
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}
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@i = dso_local thread_local global i32 15
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@i2 = external thread_local global i32
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define dso_local i32 @f1() {
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; X86-LABEL: f1:
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; X86: leal __emutls_v.i@GOTOFF(%ebx), %eax
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; X86-NEXT: movl %eax, (%esp)
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; X86-NEXT: calll __emutls_get_address@PLT
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; X86-NEXT: movl (%eax), %eax
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; X86-NEXT: addl $8, %esp
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; X86-NEXT: .cfi_def_cfa_offset 8
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; X86-NEXT: popl %ebx
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; X86-NEXT: .cfi_def_cfa_offset 4
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; X86-NEXT: retl
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; X64-LABEL: f1:
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; X64: leaq __emutls_v.i(%rip), %rdi
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; X64-NEXT: callq __emutls_get_address@PLT
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; X64-NEXT: movl (%rax), %eax
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; X64-NEXT: popq %rcx
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; X64-NEXT: .cfi_def_cfa_offset 8
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; X64-NEXT: retq
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entry:
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%tmp1 = load i32, i32* @i
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ret i32 %tmp1
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}
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define dso_local i32* @f2() {
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; X86-LABEL: f2:
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; X86: leal __emutls_v.i@GOTOFF(%ebx), %eax
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; X86-NEXT: movl %eax, (%esp)
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; X86-NEXT: calll __emutls_get_address@PLT
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; X64-LABEL: f2:
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; X64: leaq __emutls_v.i(%rip), %rdi
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; X64-NEXT: callq __emutls_get_address@PLT
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entry:
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ret i32* @i
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}
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define dso_local i32 @f3() {
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; X86-LABEL: f3:
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; X86: movl __emutls_v.i2@GOT(%ebx), %eax
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; X86-NEXT: movl %eax, (%esp)
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; X86-NEXT: calll __emutls_get_address@PLT
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; X64-LABEL: f3:
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; X64: movq __emutls_v.i2@GOTPCREL(%rip), %rdi
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; X64-NEXT: callq __emutls_get_address@PLT
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entry:
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%tmp1 = load i32, i32* @i2
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ret i32 %tmp1
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}
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define dso_local i32* @f4() {
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; X86-LABEL: f4:
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; X86: movl __emutls_v.i2@GOT(%ebx), %eax
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; X86-NEXT: movl %eax, (%esp)
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; X86-NEXT: calll __emutls_get_address@PLT
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; X64-LABEL: f4:
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; X64: movq __emutls_v.i2@GOTPCREL(%rip), %rdi
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; X64-NEXT: callq __emutls_get_address@PLT
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entry:
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ret i32* @i2
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}
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;;;;; 32-bit targets
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; X86: .data
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; X86-LABEL: __emutls_v.i:
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; X86-NEXT: .long 4
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; X86-NEXT: .long 4
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; X86-NEXT: .long 0
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; X86-NEXT: .long __emutls_t.i
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; X86: .section .rodata,
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; X86-LABEL: __emutls_t.i:
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; X86-NEXT: .long 15
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; X86-NOT: __emutls_v.i2
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; X86-NOT: __emutls_t.i2
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;;;;; 64-bit targets
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; X64: .data
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; X64-LABEL: __emutls_v.i:
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; X64-NEXT: .quad 4
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; X64-NEXT: .quad 4
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; X64-NEXT: .quad 0
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; X64-NEXT: .quad __emutls_t.i
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; X64: .section .rodata,
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; X64-LABEL: __emutls_t.i:
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; X64-NEXT: .long 15
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; X64-NOT: __emutls_v.i2
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; X64-NOT: __emutls_t.i2
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!llvm.module.flags = !{!0, !1}
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!0 = !{i32 1, !"PIC Level", i32 1}
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!1 = !{i32 1, !"PIE Level", i32 1}
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