125 lines
5.2 KiB
LLVM
125 lines
5.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE2
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86-SSE42
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64-SSE42
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; sign to float v2i16 to v2f32
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define void @convert_v2i16_to_v2f32(<2 x float>* %dst.addr, <2 x i16> %src) nounwind {
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; X86-SSE2-LABEL: convert_v2i16_to_v2f32:
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; X86-SSE2: # %bb.0: # %entry
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; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
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; X86-SSE2-NEXT: psrad $16, %xmm0
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; X86-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
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; X86-SSE2-NEXT: movlps %xmm0, (%eax)
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; X86-SSE2-NEXT: retl
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;
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; X86-SSE42-LABEL: convert_v2i16_to_v2f32:
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; X86-SSE42: # %bb.0: # %entry
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; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SSE42-NEXT: pmovsxwd %xmm0, %xmm0
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; X86-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
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; X86-SSE42-NEXT: movlps %xmm0, (%eax)
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; X86-SSE42-NEXT: retl
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;
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; X64-SSE2-LABEL: convert_v2i16_to_v2f32:
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; X64-SSE2: # %bb.0: # %entry
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; X64-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
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; X64-SSE2-NEXT: psrad $16, %xmm0
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; X64-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
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; X64-SSE2-NEXT: movlps %xmm0, (%rdi)
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; X64-SSE2-NEXT: retq
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;
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; X64-SSE42-LABEL: convert_v2i16_to_v2f32:
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; X64-SSE42: # %bb.0: # %entry
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; X64-SSE42-NEXT: pmovsxwd %xmm0, %xmm0
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; X64-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
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; X64-SSE42-NEXT: movlps %xmm0, (%rdi)
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; X64-SSE42-NEXT: retq
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entry:
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%val = sitofp <2 x i16> %src to <2 x float>
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store <2 x float> %val, <2 x float>* %dst.addr, align 4
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ret void
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}
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; sign to float v3i8 to v3f32
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define void @convert_v3i8_to_v3f32(<3 x float>* %dst.addr, <3 x i8>* %src.addr) nounwind {
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; X86-SSE2-LABEL: convert_v3i8_to_v3f32:
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; X86-SSE2: # %bb.0: # %entry
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; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-SSE2-NEXT: movzwl (%ecx), %edx
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; X86-SSE2-NEXT: movd %edx, %xmm0
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; X86-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [255,255,0,255,255,255,255,255,255,255,255,255,255,255,255,255]
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; X86-SSE2-NEXT: pand %xmm1, %xmm0
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; X86-SSE2-NEXT: movzbl 2(%ecx), %ecx
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; X86-SSE2-NEXT: movd %ecx, %xmm2
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; X86-SSE2-NEXT: pslld $16, %xmm2
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; X86-SSE2-NEXT: pandn %xmm2, %xmm1
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; X86-SSE2-NEXT: por %xmm0, %xmm1
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; X86-SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
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; X86-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
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; X86-SSE2-NEXT: psrad $24, %xmm0
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; X86-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
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; X86-SSE2-NEXT: movss %xmm0, (%eax)
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; X86-SSE2-NEXT: movaps %xmm0, %xmm1
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; X86-SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]
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; X86-SSE2-NEXT: movss %xmm1, 8(%eax)
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; X86-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]
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; X86-SSE2-NEXT: movss %xmm0, 4(%eax)
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; X86-SSE2-NEXT: retl
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;
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; X86-SSE42-LABEL: convert_v3i8_to_v3f32:
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; X86-SSE42: # %bb.0: # %entry
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; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-SSE42-NEXT: movzwl (%ecx), %edx
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; X86-SSE42-NEXT: movd %edx, %xmm0
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; X86-SSE42-NEXT: pinsrb $2, 2(%ecx), %xmm0
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; X86-SSE42-NEXT: pmovsxbd %xmm0, %xmm0
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; X86-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
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; X86-SSE42-NEXT: extractps $2, %xmm0, 8(%eax)
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; X86-SSE42-NEXT: extractps $1, %xmm0, 4(%eax)
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; X86-SSE42-NEXT: movss %xmm0, (%eax)
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; X86-SSE42-NEXT: retl
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;
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; X64-SSE2-LABEL: convert_v3i8_to_v3f32:
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; X64-SSE2: # %bb.0: # %entry
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; X64-SSE2-NEXT: movzwl (%rsi), %eax
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; X64-SSE2-NEXT: movd %eax, %xmm0
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; X64-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [255,255,0,255,255,255,255,255,255,255,255,255,255,255,255,255]
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; X64-SSE2-NEXT: pand %xmm1, %xmm0
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; X64-SSE2-NEXT: movzbl 2(%rsi), %eax
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; X64-SSE2-NEXT: movd %eax, %xmm2
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; X64-SSE2-NEXT: pslld $16, %xmm2
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; X64-SSE2-NEXT: pandn %xmm2, %xmm1
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; X64-SSE2-NEXT: por %xmm0, %xmm1
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; X64-SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
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; X64-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
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; X64-SSE2-NEXT: psrad $24, %xmm0
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; X64-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
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; X64-SSE2-NEXT: movlps %xmm0, (%rdi)
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; X64-SSE2-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
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; X64-SSE2-NEXT: movss %xmm0, 8(%rdi)
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; X64-SSE2-NEXT: retq
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;
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; X64-SSE42-LABEL: convert_v3i8_to_v3f32:
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; X64-SSE42: # %bb.0: # %entry
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; X64-SSE42-NEXT: movzwl (%rsi), %eax
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; X64-SSE42-NEXT: movd %eax, %xmm0
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; X64-SSE42-NEXT: pinsrb $2, 2(%rsi), %xmm0
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; X64-SSE42-NEXT: pmovsxbd %xmm0, %xmm0
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; X64-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
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; X64-SSE42-NEXT: extractps $2, %xmm0, 8(%rdi)
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; X64-SSE42-NEXT: movlps %xmm0, (%rdi)
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; X64-SSE42-NEXT: retq
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entry:
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%load = load <3 x i8>, <3 x i8>* %src.addr, align 1
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%cvt = sitofp <3 x i8> %load to <3 x float>
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store <3 x float> %cvt, <3 x float>* %dst.addr, align 4
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ret void
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}
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