262 lines
9.8 KiB
LLVM
262 lines
9.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-pc-linux -mattr=mmx < %s | FileCheck %s
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; MMX packed sub opcodes were wrongly marked as commutative.
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; This test checks that the operands of packed sub instructions are
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; never interchanged by the "Two-Address instruction pass".
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declare { i64, double } @getFirstParam()
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declare { i64, double } @getSecondParam()
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define i64 @test_psubb() {
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; CHECK-LABEL: test_psubb:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: callq getFirstParam
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; CHECK-NEXT: movq %rax, %rbx
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; CHECK-NEXT: callq getSecondParam
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; CHECK-NEXT: movq %rbx, %mm0
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; CHECK-NEXT: movq %rax, %mm1
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; CHECK-NEXT: psubb %mm1, %mm0
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; CHECK-NEXT: movq %mm0, %rax
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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entry:
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%call = tail call { i64, double } @getFirstParam()
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%0 = extractvalue { i64, double } %call, 0
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%call2 = tail call { i64, double } @getSecondParam()
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%1 = extractvalue { i64, double } %call2, 0
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%__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 0
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%__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 0
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%2 = bitcast <1 x i64> %__m1.0.insert.i to <8 x i8>
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%3 = bitcast <8 x i8> %2 to x86_mmx
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%4 = bitcast <1 x i64> %__m2.0.insert.i to <8 x i8>
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%5 = bitcast <8 x i8> %4 to x86_mmx
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%6 = tail call x86_mmx @llvm.x86.mmx.psub.b(x86_mmx %3, x86_mmx %5) nounwind
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%7 = bitcast x86_mmx %6 to <8 x i8>
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%8 = bitcast <8 x i8> %7 to <1 x i64>
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%retval.0.extract.i15 = extractelement <1 x i64> %8, i32 0
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ret i64 %retval.0.extract.i15
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}
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define i64 @test_psubw() {
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; CHECK-LABEL: test_psubw:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: callq getFirstParam
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; CHECK-NEXT: movq %rax, %rbx
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; CHECK-NEXT: callq getSecondParam
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; CHECK-NEXT: movq %rbx, %mm0
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; CHECK-NEXT: movq %rax, %mm1
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; CHECK-NEXT: psubw %mm1, %mm0
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; CHECK-NEXT: movq %mm0, %rax
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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entry:
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%call = tail call { i64, double } @getFirstParam()
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%0 = extractvalue { i64, double } %call, 0
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%call2 = tail call { i64, double } @getSecondParam()
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%1 = extractvalue { i64, double } %call2, 0
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%__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 0
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%__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 0
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%2 = bitcast <1 x i64> %__m1.0.insert.i to <4 x i16>
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%3 = bitcast <4 x i16> %2 to x86_mmx
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%4 = bitcast <1 x i64> %__m2.0.insert.i to <4 x i16>
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%5 = bitcast <4 x i16> %4 to x86_mmx
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%6 = tail call x86_mmx @llvm.x86.mmx.psub.w(x86_mmx %3, x86_mmx %5) nounwind
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%7 = bitcast x86_mmx %6 to <4 x i16>
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%8 = bitcast <4 x i16> %7 to <1 x i64>
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%retval.0.extract.i15 = extractelement <1 x i64> %8, i32 0
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ret i64 %retval.0.extract.i15
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}
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define i64 @test_psubd() {
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; CHECK-LABEL: test_psubd:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: callq getFirstParam
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; CHECK-NEXT: movq %rax, %rbx
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; CHECK-NEXT: callq getSecondParam
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; CHECK-NEXT: movq %rbx, %mm0
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; CHECK-NEXT: movq %rax, %mm1
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; CHECK-NEXT: psubd %mm1, %mm0
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; CHECK-NEXT: movq %mm0, %rax
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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entry:
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%call = tail call { i64, double } @getFirstParam()
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%0 = extractvalue { i64, double } %call, 0
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%call2 = tail call { i64, double } @getSecondParam()
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%1 = extractvalue { i64, double } %call2, 0
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%__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 0
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%__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 0
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%2 = bitcast <1 x i64> %__m1.0.insert.i to <2 x i32>
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%3 = bitcast <2 x i32> %2 to x86_mmx
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%4 = bitcast <1 x i64> %__m2.0.insert.i to <2 x i32>
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%5 = bitcast <2 x i32> %4 to x86_mmx
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%6 = tail call x86_mmx @llvm.x86.mmx.psub.d(x86_mmx %3, x86_mmx %5) nounwind
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%7 = bitcast x86_mmx %6 to <2 x i32>
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%8 = bitcast <2 x i32> %7 to <1 x i64>
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%retval.0.extract.i15 = extractelement <1 x i64> %8, i32 0
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ret i64 %retval.0.extract.i15
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}
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define i64 @test_psubsb() {
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; CHECK-LABEL: test_psubsb:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: callq getFirstParam
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; CHECK-NEXT: movq %rax, %rbx
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; CHECK-NEXT: callq getSecondParam
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; CHECK-NEXT: movq %rbx, %mm0
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; CHECK-NEXT: movq %rax, %mm1
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; CHECK-NEXT: psubsb %mm1, %mm0
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; CHECK-NEXT: movq %mm0, %rax
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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entry:
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%call = tail call { i64, double } @getFirstParam()
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%0 = extractvalue { i64, double } %call, 0
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%call2 = tail call { i64, double } @getSecondParam()
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%1 = extractvalue { i64, double } %call2, 0
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%__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 0
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%__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 0
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%2 = bitcast <1 x i64> %__m1.0.insert.i to <8 x i8>
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%3 = bitcast <8 x i8> %2 to x86_mmx
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%4 = bitcast <1 x i64> %__m2.0.insert.i to <8 x i8>
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%5 = bitcast <8 x i8> %4 to x86_mmx
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%6 = tail call x86_mmx @llvm.x86.mmx.psubs.b(x86_mmx %3, x86_mmx %5) nounwind
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%7 = bitcast x86_mmx %6 to <8 x i8>
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%8 = bitcast <8 x i8> %7 to <1 x i64>
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%retval.0.extract.i15 = extractelement <1 x i64> %8, i32 0
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ret i64 %retval.0.extract.i15
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}
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define i64 @test_psubswv() {
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; CHECK-LABEL: test_psubswv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: callq getFirstParam
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; CHECK-NEXT: movq %rax, %rbx
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; CHECK-NEXT: callq getSecondParam
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; CHECK-NEXT: movq %rbx, %mm0
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; CHECK-NEXT: movq %rax, %mm1
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; CHECK-NEXT: psubsw %mm1, %mm0
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; CHECK-NEXT: movq %mm0, %rax
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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entry:
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%call = tail call { i64, double } @getFirstParam()
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%0 = extractvalue { i64, double } %call, 0
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%call2 = tail call { i64, double } @getSecondParam()
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%1 = extractvalue { i64, double } %call2, 0
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%__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 0
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%__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 0
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%2 = bitcast <1 x i64> %__m1.0.insert.i to <4 x i16>
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%3 = bitcast <4 x i16> %2 to x86_mmx
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%4 = bitcast <1 x i64> %__m2.0.insert.i to <4 x i16>
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%5 = bitcast <4 x i16> %4 to x86_mmx
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%6 = tail call x86_mmx @llvm.x86.mmx.psubs.w(x86_mmx %3, x86_mmx %5) nounwind
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%7 = bitcast x86_mmx %6 to <4 x i16>
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%8 = bitcast <4 x i16> %7 to <1 x i64>
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%retval.0.extract.i15 = extractelement <1 x i64> %8, i32 0
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ret i64 %retval.0.extract.i15
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}
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define i64 @test_psubusbv() {
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; CHECK-LABEL: test_psubusbv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: callq getFirstParam
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; CHECK-NEXT: movq %rax, %rbx
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; CHECK-NEXT: callq getSecondParam
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; CHECK-NEXT: movq %rbx, %mm0
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; CHECK-NEXT: movq %rax, %mm1
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; CHECK-NEXT: psubusb %mm1, %mm0
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; CHECK-NEXT: movq %mm0, %rax
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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entry:
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%call = tail call { i64, double } @getFirstParam()
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%0 = extractvalue { i64, double } %call, 0
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%call2 = tail call { i64, double } @getSecondParam()
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%1 = extractvalue { i64, double } %call2, 0
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%__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 0
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%__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 0
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%2 = bitcast <1 x i64> %__m1.0.insert.i to <8 x i8>
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%3 = bitcast <8 x i8> %2 to x86_mmx
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%4 = bitcast <1 x i64> %__m2.0.insert.i to <8 x i8>
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%5 = bitcast <8 x i8> %4 to x86_mmx
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%6 = tail call x86_mmx @llvm.x86.mmx.psubus.b(x86_mmx %3, x86_mmx %5) nounwind
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%7 = bitcast x86_mmx %6 to <8 x i8>
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%8 = bitcast <8 x i8> %7 to <1 x i64>
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%retval.0.extract.i15 = extractelement <1 x i64> %8, i32 0
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ret i64 %retval.0.extract.i15
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}
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define i64 @test_psubuswv() {
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; CHECK-LABEL: test_psubuswv:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: callq getFirstParam
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; CHECK-NEXT: movq %rax, %rbx
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; CHECK-NEXT: callq getSecondParam
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; CHECK-NEXT: movq %rbx, %mm0
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; CHECK-NEXT: movq %rax, %mm1
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; CHECK-NEXT: psubusw %mm1, %mm0
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; CHECK-NEXT: movq %mm0, %rax
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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entry:
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%call = tail call { i64, double } @getFirstParam()
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%0 = extractvalue { i64, double } %call, 0
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%call2 = tail call { i64, double } @getSecondParam()
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%1 = extractvalue { i64, double } %call2, 0
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%__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 0
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%__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 0
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%2 = bitcast <1 x i64> %__m1.0.insert.i to <4 x i16>
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%3 = bitcast <4 x i16> %2 to x86_mmx
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%4 = bitcast <1 x i64> %__m2.0.insert.i to <4 x i16>
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%5 = bitcast <4 x i16> %4 to x86_mmx
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%6 = tail call x86_mmx @llvm.x86.mmx.psubus.w(x86_mmx %3, x86_mmx %5) nounwind
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%7 = bitcast x86_mmx %6 to <4 x i16>
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%8 = bitcast <4 x i16> %7 to <1 x i64>
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%retval.0.extract.i15 = extractelement <1 x i64> %8, i32 0
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ret i64 %retval.0.extract.i15
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}
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declare x86_mmx @llvm.x86.mmx.psubus.w(x86_mmx, x86_mmx) nounwind readnone
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declare x86_mmx @llvm.x86.mmx.psubus.b(x86_mmx, x86_mmx) nounwind readnone
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declare x86_mmx @llvm.x86.mmx.psubs.w(x86_mmx, x86_mmx) nounwind readnone
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declare x86_mmx @llvm.x86.mmx.psubs.b(x86_mmx, x86_mmx) nounwind readnone
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declare x86_mmx @llvm.x86.mmx.psub.d(x86_mmx, x86_mmx) nounwind readnone
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declare x86_mmx @llvm.x86.mmx.psub.w(x86_mmx, x86_mmx) nounwind readnone
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declare x86_mmx @llvm.x86.mmx.psub.b(x86_mmx, x86_mmx) nounwind readnone
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