154 lines
8.8 KiB
LLVM
154 lines
8.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -early-cse < %s | FileCheck %s
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; Unequal mask check.
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; Load-load: the second load can be removed if (assuming unequal masks) the
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; second loaded value is a subset of the first loaded value considering the
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; non-undef vector elements. In other words, if the second mask is a submask
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; of the first one, and the through value of the second load is undef.
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; Load-load, second mask is a submask of the first, second through is undef.
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; Expect the second load to be removed.
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define <4 x i32> @f3(<4 x i32>* %a0, <4 x i32> %a1) {
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; CHECK-LABEL: @f3(
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; CHECK-NEXT: [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* [[A0:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> [[A1:%.*]])
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; CHECK-NEXT: [[V2:%.*]] = add <4 x i32> [[V0]], [[V0]]
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; CHECK-NEXT: ret <4 x i32> [[V2]]
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;
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%v0 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> %a1)
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%v1 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> undef)
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%v2 = add <4 x i32> %v0, %v1
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ret <4 x i32> %v2
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}
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; Load-load, second mask is a submask of the first, second through is not undef.
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; Expect the second load to remain.
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define <4 x i32> @f4(<4 x i32>* %a0, <4 x i32> %a1) {
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; CHECK-LABEL: @f4(
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; CHECK-NEXT: [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* [[A0:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> [[A1:%.*]])
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; CHECK-NEXT: [[V1:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* [[A0]], i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> zeroinitializer)
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; CHECK-NEXT: [[V2:%.*]] = add <4 x i32> [[V0]], [[V1]]
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; CHECK-NEXT: ret <4 x i32> [[V2]]
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;
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%v0 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> %a1)
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%v1 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> zeroinitializer)
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%v2 = add <4 x i32> %v0, %v1
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ret <4 x i32> %v2
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}
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; Load-load, second mask is not a submask of the first, second through is undef.
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; Expect the second load to remain.
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define <4 x i32> @f5(<4 x i32>* %a0, <4 x i32> %a1) {
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; CHECK-LABEL: @f5(
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; CHECK-NEXT: [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* [[A0:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> [[A1:%.*]])
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; CHECK-NEXT: [[V1:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* [[A0]], i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> zeroinitializer)
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; CHECK-NEXT: [[V2:%.*]] = add <4 x i32> [[V0]], [[V1]]
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; CHECK-NEXT: ret <4 x i32> [[V2]]
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;
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%v0 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> %a1)
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%v1 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> zeroinitializer)
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%v2 = add <4 x i32> %v0, %v1
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ret <4 x i32> %v2
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}
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; Store-store: the first store can be removed if the first; mask is a submask
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; of the second mask.
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; Store-store, first mask is a submask of the second.
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; Expect the first store to be removed.
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define void @f6(<4 x i32> %a0, <4 x i32>* %a1) {
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; CHECK-LABEL: @f6(
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; CHECK-NEXT: call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> [[A0:%.*]], <4 x i32>* [[A1:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
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; CHECK-NEXT: ret void
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;
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call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %a0, <4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>)
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call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %a0, <4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
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ret void
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}
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; Store-store, first mask is not a submask of the second.
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; Expect both stores to remain.
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define void @f7(<4 x i32> %a0, <4 x i32>* %a1) {
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; CHECK-LABEL: @f7(
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; CHECK-NEXT: call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> [[A0:%.*]], <4 x i32>* [[A1:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
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; CHECK-NEXT: call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> [[A0]], <4 x i32>* [[A1]], i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>)
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; CHECK-NEXT: ret void
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;
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call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %a0, <4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
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call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %a0, <4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>)
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ret void
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}
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; Load-store: the store can be removed if the store's mask is a submask of the
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; load's mask.
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; Load-store, second mask is a submask of the first.
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; Expect the store to be removed.
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define <4 x i32> @f8(<4 x i32>* %a0, <4 x i32> %a1) {
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; CHECK-LABEL: @f8(
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; CHECK-NEXT: [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* [[A0:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> [[A1:%.*]])
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; CHECK-NEXT: ret <4 x i32> [[V0]]
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;
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%v0 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> %a1)
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call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %v0, <4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>)
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ret <4 x i32> %v0
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}
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; Load-store, second mask is not a submask of the first.
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; Expect the store to remain.
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define <4 x i32> @f9(<4 x i32>* %a0, <4 x i32> %a1) {
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; CHECK-LABEL: @f9(
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; CHECK-NEXT: [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* [[A0:%.*]], i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> [[A1:%.*]])
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; CHECK-NEXT: call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> [[V0]], <4 x i32>* [[A0]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
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; CHECK-NEXT: ret <4 x i32> [[V0]]
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;
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%v0 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> %a1)
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call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %v0, <4 x i32>* %a0, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
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ret <4 x i32> %v0
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}
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; Store-load: the load can be removed if load's mask is a submask of the
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; store's mask, and the load's through value is undef.
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; Store-load, load's mask is a submask of store's mask, thru is undef.
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; Expect the load to be removed.
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define <4 x i32> @fa(<4 x i32> %a0, <4 x i32>* %a1) {
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; CHECK-LABEL: @fa(
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; CHECK-NEXT: call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> [[A0:%.*]], <4 x i32>* [[A1:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
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; CHECK-NEXT: ret <4 x i32> [[A0]]
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;
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call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %a0, <4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
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%v0 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> undef)
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ret <4 x i32> %v0
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}
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; Store-load, load's mask is a submask of store's mask, thru is not undef.
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; Expect the load to remain.
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define <4 x i32> @fb(<4 x i32> %a0, <4 x i32>* %a1) {
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; CHECK-LABEL: @fb(
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; CHECK-NEXT: call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> [[A0:%.*]], <4 x i32>* [[A1:%.*]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
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; CHECK-NEXT: [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* [[A1]], i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> zeroinitializer)
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; CHECK-NEXT: ret <4 x i32> [[V0]]
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;
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call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %a0, <4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>)
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%v0 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> zeroinitializer)
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ret <4 x i32> %v0
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}
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; Store-load, load's mask is not a submask of store's mask, thru is undef.
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; Expect the load to remain.
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define <4 x i32> @fc(<4 x i32> %a0, <4 x i32>* %a1) {
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; CHECK-LABEL: @fc(
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; CHECK-NEXT: call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> [[A0:%.*]], <4 x i32>* [[A1:%.*]], i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>)
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; CHECK-NEXT: [[V0:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* [[A1]], i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> undef)
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; CHECK-NEXT: ret <4 x i32> [[V0]]
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;
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call void @llvm.masked.store.v4i32.p0v4i32(<4 x i32> %a0, <4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 false, i1 false, i1 true>)
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%v0 = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %a1, i32 4, <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> undef)
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ret <4 x i32> %v0
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}
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declare <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>*, i32, <4 x i1>, <4 x i32>)
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declare void @llvm.masked.store.v4i32.p0v4i32(<4 x i32>, <4 x i32>*, i32, <4 x i1>)
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