223 lines
8.5 KiB
LLVM
223 lines
8.5 KiB
LLVM
; REQUIRES: asserts
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; RUN: opt -S -loop-vectorize -force-vector-width=8 -force-vector-interleave=1 -enable-interleaved-mem-accesses -debug-only=loop-vectorize,vectorutils -disable-output < %s 2>&1 | FileCheck %s -check-prefix=STRIDED_UNMASKED
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; RUN: opt -S -loop-vectorize -force-vector-width=8 -force-vector-interleave=1 -enable-interleaved-mem-accesses -enable-masked-interleaved-mem-accesses -debug-only=loop-vectorize,vectorutils -disable-output < %s 2>&1 | FileCheck %s -check-prefix=STRIDED_MASKED
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target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
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; We test here that the loop-vectorizer forms an interleave-groups from
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; predicated memory accesses only if they are both in the same (predicated)
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; block (first scenario below).
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; If the accesses are not in the same predicated block, an interleave-group
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; is not formed (scenarios 2,3 below).
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; Scenario 1: Check the case where it is legal to create masked interleave-
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; groups. Altogether two groups are created (one for loads and one for stores)
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; when masked-interleaved-acceses are enabled. When masked-interleaved-acceses
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; are disabled we do not create any interleave-group.
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;
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; void masked_strided1(const unsigned char* restrict p,
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; unsigned char* restrict q,
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; unsigned char guard) {
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; for(ix=0; ix < 1024; ++ix) {
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; if (ix > guard) {
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; char left = p[2*ix];
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; char right = p[2*ix + 1];
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; char max = max(left, right);
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; q[2*ix] = max;
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; q[2*ix+1] = 0 - max;
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; }
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; }
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;}
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; STRIDED_UNMASKED: LV: Checking a loop in "masked_strided1"
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; STRIDED_UNMASKED: LV: Analyzing interleaved accesses...
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; STRIDED_UNMASKED-NOT: LV: Creating an interleave group
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; STRIDED_MASKED: LV: Checking a loop in "masked_strided1"
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; STRIDED_MASKED: LV: Analyzing interleaved accesses...
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; STRIDED_MASKED-NEXT: LV: Creating an interleave group with: store i8 %{{.*}}, i8* %{{.*}}, align 1
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; STRIDED_MASKED-NEXT: LV: Inserted: store i8 %{{.*}}, i8* %{{.*}}, align 1
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; STRIDED_MASKED-NEXT: into the interleave group with store i8 %{{.*}}, i8* %{{.*}}, align 1
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; STRIDED_MASKED-NEXT: LV: Creating an interleave group with: %{{.*}} = load i8, i8* %{{.*}}, align 1
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; STRIDED_MASKED-NEXT: LV: Inserted: %{{.*}} = load i8, i8* %{{.*}}, align 1
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; STRIDED_MASKED-NEXT: into the interleave group with %{{.*}} = load i8, i8* %{{.*}}, align 1
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; Scenario 2: Check the case where it is illegal to create a masked interleave-
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; group because the first access is predicated, and the second isn't.
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; We therefore create a separate interleave-group with gaps for each of the
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; stores (if masked-interleaved-accesses are enabled) and these are later
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; invalidated because interleave-groups of stores with gaps are not supported.
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; If masked-interleaved-accesses is not enabled we create only one interleave
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; group of stores (for the non-predicated store) and it is later invalidated
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; due to gaps.
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;
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; void masked_strided2(const unsigned char* restrict p,
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; unsigned char* restrict q,
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; unsigned char guard1,
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; unsigned char guard2) {
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; for(ix=0; ix < 1024; ++ix) {
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; if (ix > guard1) {
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; q[2*ix] = 1;
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; }
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; q[2*ix+1] = 2;
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; }
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;}
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; STRIDED_UNMASKED: LV: Checking a loop in "masked_strided2"
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; STRIDED_UNMASKED: LV: Analyzing interleaved accesses...
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; STRIDED_UNMASKED-NEXT: LV: Creating an interleave group with: store i8 1, i8* %{{.*}}, align 1
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; STRIDED_UNMASKED-NEXT: LV: Invalidate candidate interleaved store group due to gaps.
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; STRIDED_UNMASKED-NOT: LV: Creating an interleave group
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; STRIDED_MASKED: LV: Checking a loop in "masked_strided2"
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; STRIDED_MASKED: LV: Analyzing interleaved accesses...
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; STRIDED_MASKED-NEXT: LV: Creating an interleave group with: store i8 2, i8* %{{.*}}, align 1
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; STRIDED_MASKED-NEXT: LV: Creating an interleave group with: store i8 1, i8* %{{.*}}, align 1
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; STRIDED_MASKED-NEXT: LV: Invalidate candidate interleaved store group due to gaps.
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; STRIDED_MASKED-NEXT: LV: Invalidate candidate interleaved store group due to gaps.
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; Scenario 3: Check the case where it is illegal to create a masked interleave-
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; group because the two accesses are in separate predicated blocks.
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; We therefore create a separate interleave-group with gaps for each of the accesses,
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; (which are later invalidated because interleave-groups of stores with gaps are
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; not supported).
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; If masked-interleaved-accesses is not enabled we don't create any interleave
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; group because all accesses are predicated.
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;
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; void masked_strided3(const unsigned char* restrict p,
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; unsigned char* restrict q,
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; unsigned char guard1,
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; unsigned char guard2) {
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; for(ix=0; ix < 1024; ++ix) {
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; if (ix > guard1) {
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; q[2*ix] = 1;
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; }
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; if (ix > guard2) {
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; q[2*ix+1] = 2;
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; }
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; }
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;}
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; STRIDED_UNMASKED: LV: Checking a loop in "masked_strided3"
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; STRIDED_UNMASKED: LV: Analyzing interleaved accesses...
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; STRIDED_UNMASKED-NOT: LV: Creating an interleave group
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; STRIDED_MASKED: LV: Checking a loop in "masked_strided3"
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; STRIDED_MASKED: LV: Analyzing interleaved accesses...
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; STRIDED_MASKED-NEXT: LV: Creating an interleave group with: store i8 2, i8* %{{.*}}, align 1
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; STRIDED_MASKED-NEXT: LV: Creating an interleave group with: store i8 1, i8* %{{.*}}, align 1
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; STRIDED_MASKED-NEXT: LV: Invalidate candidate interleaved store group due to gaps.
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; STRIDED_MASKED-NEXT: LV: Invalidate candidate interleaved store group due to gaps.
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; ModuleID = 'test.c'
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source_filename = "test.c"
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target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
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target triple = "i386-unknown-linux-gnu"
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define dso_local void @masked_strided1(i8* noalias nocapture readonly %p, i8* noalias nocapture %q, i8 zeroext %guard) local_unnamed_addr #0 {
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entry:
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%conv = zext i8 %guard to i32
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br label %for.body
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for.body:
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%ix.024 = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
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%cmp1 = icmp ugt i32 %ix.024, %conv
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br i1 %cmp1, label %if.then, label %for.inc
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if.then:
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%mul = shl nuw nsw i32 %ix.024, 1
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%arrayidx = getelementptr inbounds i8, i8* %p, i32 %mul
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%0 = load i8, i8* %arrayidx, align 1
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%add = or i32 %mul, 1
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%arrayidx4 = getelementptr inbounds i8, i8* %p, i32 %add
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%1 = load i8, i8* %arrayidx4, align 1
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%cmp.i = icmp slt i8 %0, %1
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%spec.select.i = select i1 %cmp.i, i8 %1, i8 %0
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%arrayidx6 = getelementptr inbounds i8, i8* %q, i32 %mul
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store i8 %spec.select.i, i8* %arrayidx6, align 1
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%sub = sub i8 0, %spec.select.i
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%arrayidx11 = getelementptr inbounds i8, i8* %q, i32 %add
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store i8 %sub, i8* %arrayidx11, align 1
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br label %for.inc
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for.inc:
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%inc = add nuw nsw i32 %ix.024, 1
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%exitcond = icmp eq i32 %inc, 1024
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br i1 %exitcond, label %for.end, label %for.body
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for.end:
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ret void
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}
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define dso_local void @masked_strided2(i8* noalias nocapture readnone %p, i8* noalias nocapture %q, i8 zeroext %guard) local_unnamed_addr #0 {
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entry:
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%conv = zext i8 %guard to i32
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br label %for.body
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for.body:
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%ix.012 = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
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%mul = shl nuw nsw i32 %ix.012, 1
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%arrayidx = getelementptr inbounds i8, i8* %q, i32 %mul
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store i8 1, i8* %arrayidx, align 1
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%cmp1 = icmp ugt i32 %ix.012, %conv
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br i1 %cmp1, label %if.then, label %for.inc
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if.then:
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%add = or i32 %mul, 1
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%arrayidx3 = getelementptr inbounds i8, i8* %q, i32 %add
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store i8 2, i8* %arrayidx3, align 1
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br label %for.inc
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for.inc:
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%inc = add nuw nsw i32 %ix.012, 1
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%exitcond = icmp eq i32 %inc, 1024
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br i1 %exitcond, label %for.end, label %for.body
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for.end:
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ret void
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}
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define dso_local void @masked_strided3(i8* noalias nocapture readnone %p, i8* noalias nocapture %q, i8 zeroext %guard1, i8 zeroext %guard2) local_unnamed_addr #0 {
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entry:
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%conv = zext i8 %guard1 to i32
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%conv3 = zext i8 %guard2 to i32
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br label %for.body
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for.body:
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%ix.018 = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
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%mul = shl nuw nsw i32 %ix.018, 1
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%cmp1 = icmp ugt i32 %ix.018, %conv
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br i1 %cmp1, label %if.then, label %if.end
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if.then:
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%arrayidx = getelementptr inbounds i8, i8* %q, i32 %mul
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store i8 1, i8* %arrayidx, align 1
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br label %if.end
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if.end:
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%cmp4 = icmp ugt i32 %ix.018, %conv3
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br i1 %cmp4, label %if.then6, label %for.inc
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if.then6:
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%add = or i32 %mul, 1
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%arrayidx7 = getelementptr inbounds i8, i8* %q, i32 %add
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store i8 2, i8* %arrayidx7, align 1
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br label %for.inc
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for.inc:
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%inc = add nuw nsw i32 %ix.018, 1
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%exitcond = icmp eq i32 %inc, 1024
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br i1 %exitcond, label %for.end, label %for.body
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for.end:
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ret void
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}
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attributes #0 = { "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" }
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