75 lines
2.4 KiB
LLVM
75 lines
2.4 KiB
LLVM
; RUN: llc -O1 < %s -march=avr | FileCheck %s
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; This test ensures that the Select8/Select16 expansion
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; pass inserts an unconditional branch to the previous adjacent
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; basic block when inserting new basic blocks when the
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; prior block has a fallthrough.
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;
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; Before this bug was fixed, Select8/Select16 expansion
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; would leave a dangling fallthrough to an undefined block.
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;
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; The BranchFolding pass would later rearrange the basic
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; blocks based on predecessor/successor list assumptions
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; which were made incorrect due to the invalid Select
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; expansion.
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; More information in
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; https://github.com/avr-rust/rust/issues/123.
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%UInt8 = type <{ i8 }>
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%UInt32 = type <{ i32 }>
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%Sb = type <{ i1 }>
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@delayFactor = hidden global %UInt8 zeroinitializer, align 1
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@delay = hidden global %UInt32 zeroinitializer, align 4
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@flag = hidden global %Sb zeroinitializer, align 1
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declare void @eeprom_write(i16, i8)
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; CHECK-LABEL: update_register
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define hidden void @update_register(i8 %arg, i8 %arg1) {
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entry:
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; CHECK: push [[PRELUDER:r[0-9]+]]
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; CHECK: cpi r24, 7
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switch i8 %arg, label %bb7 [
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i8 6, label %bb
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i8 7, label %bb6
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]
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; CHECK-NOT: ret
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bb: ; preds = %entry
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%tmp = icmp ugt i8 %arg1, 90
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%tmp2 = icmp ult i8 %arg1, 5
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%. = select i1 %tmp2, i8 5, i8 %arg1
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%tmp3 = select i1 %tmp, i8 90, i8 %.
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; CHECK: sts delayFactor, r{{[0-9]+}}
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store i8 %tmp3, i8* getelementptr inbounds (%UInt8, %UInt8* @delayFactor, i64 0, i32 0), align 1
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%tmp4 = zext i8 %tmp3 to i32
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%tmp5 = mul nuw nsw i32 %tmp4, 100
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; CHECK: sts delay+3, r{{[0-9]+}}
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; CHECK-NEXT: sts delay+2, r{{[0-9]+}}
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; CHECK-NEXT: sts delay+1, r{{[0-9]+}}
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; CHECK-NEXT: sts delay, r{{[0-9]+}}
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store i32 %tmp5, i32* getelementptr inbounds (%UInt32, %UInt32* @delay, i64 0, i32 0), align 4
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tail call void @eeprom_write(i16 34, i8 %tmp3)
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br label %bb7
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bb6: ; preds = %entry
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%not. = icmp ne i8 %arg1, 0
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%.2 = zext i1 %not. to i8
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store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @flag, i64 0, i32 0), align 1
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; CHECK: call eeprom_write
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tail call void @eeprom_write(i16 35, i8 %.2)
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br label %bb7
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; CHECK: LBB0_{{[0-9]+}}
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; CHECK: pop [[PRELUDER]]
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; CHECK-NEXT: ret
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bb7: ; preds = %bb6, %bb, %entry
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ret void
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}
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; CHECK-NOT: LBB0_{{[0-9]+}}:
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; CHECK-LABEL: .Lfunc_end0
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; CHECK: .size update_register, .Lfunc_end0-update_register
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