56 lines
2.7 KiB
LLVM
56 lines
2.7 KiB
LLVM
; RUN: llc -march=mips -mcpu=mips32 -asm-show-inst < %s | FileCheck %s --check-prefix=MIPS32
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; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+fp64 -asm-show-inst < %s | FileCheck %s --check-prefix=MIPS32FP64
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; RUN: llc -march=mips -mcpu=mips32r3 -mattr=+micromips -asm-show-inst < %s | FileCheck %s --check-prefix=MM
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; RUN: llc -march=mips -mcpu=mips32r3 -mattr=+micromips,+fp64 -asm-show-inst < %s | FileCheck %s --check-prefix=MMFP64
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; RUN: llc -march=mips -mcpu=mips32r6 -mattr=+micromips -asm-show-inst < %s | FileCheck %s --check-prefix=MMR6
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define double @add_d(double %a, double %b) {
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; MIPS32: add.d {{.*}} # <MCInst #{{[0-9]+}} FADD_D32
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; MIPS32FP64: add.d {{.*}} # <MCInst #{{[0-9]+}} FADD_D64
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; MM: add.d {{.*}} # <MCInst #{{[0-9]+}} FADD_D32_MM
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; MMFP64: add.d {{.*}} # <MCInst #{{[0-9]+}} FADD_D64_MM
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; MMR6: add.d {{.*}} # <MCInst #{{[0-9]+}} FADD_D64_MM
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%1 = fadd double %a, %b
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ret double %1
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}
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define double @sub_d(double %a, double %b) {
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; MIPS32: sub.d {{.*}} # <MCInst #{{[0-9]+}} FSUB_D32
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; MIPS32FP64: sub.d {{.*}} # <MCInst #{{[0-9]+}} FSUB_D64
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; MM: sub.d {{.*}} # <MCInst #{{[0-9]+}} FSUB_D32_MM
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; MMFP64: sub.d {{.*}} # <MCInst #{{[0-9]+}} FSUB_D64_MM
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; MMR6: sub.d {{.*}} # <MCInst #{{[0-9]+}} FSUB_D64_MM
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%1 = fsub double %a, %b
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ret double %1
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}
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define double @mul_d(double %a, double %b) {
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; MIPS32: mul.d {{.*}} # <MCInst #{{[0-9]+}} FMUL_D32
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; MIPS32FP64: mul.d {{.*}} # <MCInst #{{[0-9]+}} FMUL_D64
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; MM: mul.d {{.*}} # <MCInst #{{[0-9]+}} FMUL_D32_MM
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; MMFP64: mul.d {{.*}} # <MCInst #{{[0-9]+}} FMUL_D64_MM
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; MMR6: mul.d {{.*}} # <MCInst #{{[0-9]+}} FMUL_D64_MM
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%1 = fmul double %a, %b
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ret double %1
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}
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define double @div_d(double %a, double %b) {
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; MIPS32: div.d {{.*}} # <MCInst #{{[0-9]+}} FDIV_D32
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; MIPS32FP64: div.d {{.*}} # <MCInst #{{[0-9]+}} FDIV_D64
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; MM: div.d {{.*}} # <MCInst #{{[0-9]+}} FDIV_D32_MM
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; MMFP64: div.d {{.*}} # <MCInst #{{[0-9]+}} FDIV_D64_MM
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; MMR6: div.d {{.*}} # <MCInst #{{[0-9]+}} FDIV_D64_MM
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%1 = fdiv double %a, %b
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ret double %1
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}
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define double @fneg(double %a) {
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; MIPS32: neg.d {{.*}} # <MCInst #{{[0-9]+}} FNEG_D32
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; MIPS32FP64: neg.d {{.*}} # <MCInst #{{[0-9]+}} FNEG_D64
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; MM: neg.d {{.*}} # <MCInst #{{[0-9]+}} FNEG_D32_MM
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; MMFP64: neg.d {{.*}} # <MCInst #{{[0-9]+}} FNEG_D64_MM
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; MMR6: neg.d {{.*}} # <MCInst #{{[0-9]+}} FNEG_D64_MM
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%1 = fsub double -0.000000e+00, %a
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ret double %1
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}
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