149 lines
7.0 KiB
LLVM
149 lines
7.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx,+f16c -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX,X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+f16c -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX,X64
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX512VL,X86-AVX512VL
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX512VL,X64-AVX512VL
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define <4 x float> @test_x86_vcvtph2ps_128(<8 x i16> %a0) {
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; AVX-LABEL: test_x86_vcvtph2ps_128:
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; AVX: # %bb.0:
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; AVX-NEXT: vcvtph2ps %xmm0, %xmm0 # encoding: [0xc4,0xe2,0x79,0x13,0xc0]
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; AVX-NEXT: ret{{[l|q]}} # encoding: [0xc3]
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;
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; AVX512VL-LABEL: test_x86_vcvtph2ps_128:
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; AVX512VL: # %bb.0:
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; AVX512VL-NEXT: vcvtph2ps %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x13,0xc0]
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; AVX512VL-NEXT: ret{{[l|q]}} # encoding: [0xc3]
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%res = call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %a0) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16>) nounwind readonly
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define <4 x float> @test_x86_vcvtph2ps_128_m(<8 x i16>* nocapture %a) {
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; X86-LABEL: test_x86_vcvtph2ps_128_m:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-NEXT: vcvtph2ps (%eax), %xmm0 # encoding: [0xc4,0xe2,0x79,0x13,0x00]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_x86_vcvtph2ps_128_m:
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; X64: # %bb.0:
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; X64-NEXT: vcvtph2ps (%rdi), %xmm0 # encoding: [0xc4,0xe2,0x79,0x13,0x07]
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; X64-NEXT: retq # encoding: [0xc3]
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;
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; X86-AVX512VL-LABEL: test_x86_vcvtph2ps_128_m:
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; X86-AVX512VL: # %bb.0:
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; X86-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-AVX512VL-NEXT: vcvtph2ps (%eax), %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x13,0x00]
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; X86-AVX512VL-NEXT: retl # encoding: [0xc3]
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;
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; X64-AVX512VL-LABEL: test_x86_vcvtph2ps_128_m:
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; X64-AVX512VL: # %bb.0:
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; X64-AVX512VL-NEXT: vcvtph2ps (%rdi), %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x13,0x07]
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; X64-AVX512VL-NEXT: retq # encoding: [0xc3]
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%load = load <8 x i16>, <8 x i16>* %a
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%res = call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %load) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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define <8 x float> @test_x86_vcvtph2ps_256(<8 x i16> %a0) {
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; AVX-LABEL: test_x86_vcvtph2ps_256:
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; AVX: # %bb.0:
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; AVX-NEXT: vcvtph2ps %xmm0, %ymm0 # encoding: [0xc4,0xe2,0x7d,0x13,0xc0]
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; AVX-NEXT: ret{{[l|q]}} # encoding: [0xc3]
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;
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; AVX512VL-LABEL: test_x86_vcvtph2ps_256:
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; AVX512VL: # %bb.0:
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; AVX512VL-NEXT: vcvtph2ps %xmm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7d,0x13,0xc0]
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; AVX512VL-NEXT: ret{{[l|q]}} # encoding: [0xc3]
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%res = call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %a0) ; <<8 x float>> [#uses=1]
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ret <8 x float> %res
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}
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declare <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16>) nounwind readonly
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define <8 x float> @test_x86_vcvtph2ps_256_m(<8 x i16>* nocapture %a) nounwind {
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; X86-LABEL: test_x86_vcvtph2ps_256_m:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-NEXT: vcvtph2ps (%eax), %ymm0 # encoding: [0xc4,0xe2,0x7d,0x13,0x00]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_x86_vcvtph2ps_256_m:
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; X64: # %bb.0:
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; X64-NEXT: vcvtph2ps (%rdi), %ymm0 # encoding: [0xc4,0xe2,0x7d,0x13,0x07]
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; X64-NEXT: retq # encoding: [0xc3]
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;
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; X86-AVX512VL-LABEL: test_x86_vcvtph2ps_256_m:
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; X86-AVX512VL: # %bb.0:
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; X86-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-AVX512VL-NEXT: vcvtph2ps (%eax), %ymm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7d,0x13,0x00]
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; X86-AVX512VL-NEXT: retl # encoding: [0xc3]
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;
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; X64-AVX512VL-LABEL: test_x86_vcvtph2ps_256_m:
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; X64-AVX512VL: # %bb.0:
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; X64-AVX512VL-NEXT: vcvtph2ps (%rdi), %ymm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7d,0x13,0x07]
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; X64-AVX512VL-NEXT: retq # encoding: [0xc3]
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%load = load <8 x i16>, <8 x i16>* %a
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%res = tail call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %load)
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ret <8 x float> %res
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}
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define <4 x float> @test_x86_vcvtph2ps_128_scalar(i64* %ptr) {
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; X86-LABEL: test_x86_vcvtph2ps_128_scalar:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-NEXT: vcvtph2ps (%eax), %xmm0 # encoding: [0xc4,0xe2,0x79,0x13,0x00]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_x86_vcvtph2ps_128_scalar:
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; X64: # %bb.0:
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; X64-NEXT: vcvtph2ps (%rdi), %xmm0 # encoding: [0xc4,0xe2,0x79,0x13,0x07]
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; X64-NEXT: retq # encoding: [0xc3]
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;
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; X86-AVX512VL-LABEL: test_x86_vcvtph2ps_128_scalar:
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; X86-AVX512VL: # %bb.0:
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; X86-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-AVX512VL-NEXT: vcvtph2ps (%eax), %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x13,0x00]
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; X86-AVX512VL-NEXT: retl # encoding: [0xc3]
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;
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; X64-AVX512VL-LABEL: test_x86_vcvtph2ps_128_scalar:
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; X64-AVX512VL: # %bb.0:
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; X64-AVX512VL-NEXT: vcvtph2ps (%rdi), %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x13,0x07]
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; X64-AVX512VL-NEXT: retq # encoding: [0xc3]
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%load = load i64, i64* %ptr
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%ins1 = insertelement <2 x i64> undef, i64 %load, i32 0
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%ins2 = insertelement <2 x i64> %ins1, i64 0, i32 1
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%bc = bitcast <2 x i64> %ins2 to <8 x i16>
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%res = tail call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %bc) #2
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ret <4 x float> %res
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}
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define <4 x float> @test_x86_vcvtph2ps_128_scalar2(i64* %ptr) {
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; X86-LABEL: test_x86_vcvtph2ps_128_scalar2:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-NEXT: vcvtph2ps (%eax), %xmm0 # encoding: [0xc4,0xe2,0x79,0x13,0x00]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_x86_vcvtph2ps_128_scalar2:
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; X64: # %bb.0:
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; X64-NEXT: vcvtph2ps (%rdi), %xmm0 # encoding: [0xc4,0xe2,0x79,0x13,0x07]
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; X64-NEXT: retq # encoding: [0xc3]
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;
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; X86-AVX512VL-LABEL: test_x86_vcvtph2ps_128_scalar2:
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; X86-AVX512VL: # %bb.0:
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; X86-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-AVX512VL-NEXT: vcvtph2ps (%eax), %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x13,0x00]
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; X86-AVX512VL-NEXT: retl # encoding: [0xc3]
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;
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; X64-AVX512VL-LABEL: test_x86_vcvtph2ps_128_scalar2:
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; X64-AVX512VL: # %bb.0:
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; X64-AVX512VL-NEXT: vcvtph2ps (%rdi), %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x13,0x07]
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; X64-AVX512VL-NEXT: retq # encoding: [0xc3]
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%load = load i64, i64* %ptr
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%ins = insertelement <2 x i64> undef, i64 %load, i32 0
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%bc = bitcast <2 x i64> %ins to <8 x i16>
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%res = tail call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %bc)
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ret <4 x float> %res
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}
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