llvm-for-llvmta/test/CodeGen/X86/mul-shift-reassoc.ll

20 lines
727 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-- | FileCheck %s
define i32 @test(i32 %X, i32 %Y) {
; Push the shl through the mul to allow an LEA to be formed, instead
; of using a shift and add separately.
; CHECK-LABEL: test:
; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: imull %eax, %ecx
; CHECK-NEXT: leal (%eax,%ecx,2), %eax
; CHECK-NEXT: retl
%tmp.2 = shl i32 %X, 1 ; <i32> [#uses=1]
%tmp.3 = mul i32 %tmp.2, %Y ; <i32> [#uses=1]
%tmp.5 = add i32 %tmp.3, %Y ; <i32> [#uses=1]
ret i32 %tmp.5
}