34 lines
999 B
C
34 lines
999 B
C
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2022, Linaro Ltd.
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*/
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#ifndef __QCOM_CLK_REGMAP_PHY_MUX_H__
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#define __QCOM_CLK_REGMAP_PHY_MUX_H__
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#include "clk-regmap.h"
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/*
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* A clock implementation for PHY pipe and symbols clock muxes.
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*
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* If the clock is running off the from-PHY source, report it as enabled.
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* Report it as disabled otherwise (if it uses reference source).
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*
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* This way the PHY will disable the pipe clock before turning off the GDSC,
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* which in turn would lead to disabling corresponding pipe_clk_src (and thus
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* it being parked to a safe, reference clock source). And vice versa, after
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* enabling the GDSC the PHY will enable the pipe clock, which would cause
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* pipe_clk_src to be switched from a safe source to the working one.
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*
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* For some platforms this should be used for the UFS symbol_clk_src clocks
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* too.
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*/
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struct clk_regmap_phy_mux {
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u32 reg;
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struct clk_regmap clkr;
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};
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extern const struct clk_ops clk_regmap_phy_mux_ops;
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#endif
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