493 lines
15 KiB
C
493 lines
15 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Industrial I/O driver for Microchip digital potentiometers
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*
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* Copyright (c) 2016 Slawomir Stepien
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* Based on: Peter Rosin's code from mcp4531.c
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*
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* Datasheet: https://ww1.microchip.com/downloads/en/DeviceDoc/22060b.pdf
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*
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* DEVID #Wipers #Positions Resistor Opts (kOhm)
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* mcp4131 1 129 5, 10, 50, 100
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* mcp4132 1 129 5, 10, 50, 100
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* mcp4141 1 129 5, 10, 50, 100
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* mcp4142 1 129 5, 10, 50, 100
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* mcp4151 1 257 5, 10, 50, 100
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* mcp4152 1 257 5, 10, 50, 100
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* mcp4161 1 257 5, 10, 50, 100
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* mcp4162 1 257 5, 10, 50, 100
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* mcp4231 2 129 5, 10, 50, 100
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* mcp4232 2 129 5, 10, 50, 100
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* mcp4241 2 129 5, 10, 50, 100
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* mcp4242 2 129 5, 10, 50, 100
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* mcp4251 2 257 5, 10, 50, 100
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* mcp4252 2 257 5, 10, 50, 100
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* mcp4261 2 257 5, 10, 50, 100
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* mcp4262 2 257 5, 10, 50, 100
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*/
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/*
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* TODO:
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* 1. Write wiper setting to EEPROM for EEPROM capable models.
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*/
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#include <linux/cache.h>
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#include <linux/err.h>
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#include <linux/export.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/types.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/mutex.h>
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#include <linux/property.h>
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#include <linux/spi/spi.h>
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#define MCP4131_WRITE (0x00 << 2)
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#define MCP4131_READ (0x03 << 2)
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#define MCP4131_WIPER_SHIFT 4
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#define MCP4131_CMDERR(r) ((r[0]) & 0x02)
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#define MCP4131_RAW(r) ((r[0]) == 0xff ? 0x100 : (r[1]))
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struct mcp4131_cfg {
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int wipers;
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int max_pos;
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int kohms;
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};
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enum mcp4131_type {
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MCP413x_502 = 0,
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MCP413x_103,
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MCP413x_503,
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MCP413x_104,
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MCP414x_502,
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MCP414x_103,
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MCP414x_503,
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MCP414x_104,
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MCP415x_502,
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MCP415x_103,
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MCP415x_503,
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MCP415x_104,
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MCP416x_502,
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MCP416x_103,
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MCP416x_503,
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MCP416x_104,
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MCP423x_502,
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MCP423x_103,
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MCP423x_503,
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MCP423x_104,
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MCP424x_502,
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MCP424x_103,
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MCP424x_503,
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MCP424x_104,
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MCP425x_502,
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MCP425x_103,
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MCP425x_503,
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MCP425x_104,
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MCP426x_502,
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MCP426x_103,
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MCP426x_503,
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MCP426x_104,
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};
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static const struct mcp4131_cfg mcp4131_cfg[] = {
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[MCP413x_502] = { .wipers = 1, .max_pos = 128, .kohms = 5, },
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[MCP413x_103] = { .wipers = 1, .max_pos = 128, .kohms = 10, },
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[MCP413x_503] = { .wipers = 1, .max_pos = 128, .kohms = 50, },
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[MCP413x_104] = { .wipers = 1, .max_pos = 128, .kohms = 100, },
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[MCP414x_502] = { .wipers = 1, .max_pos = 128, .kohms = 5, },
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[MCP414x_103] = { .wipers = 1, .max_pos = 128, .kohms = 10, },
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[MCP414x_503] = { .wipers = 1, .max_pos = 128, .kohms = 50, },
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[MCP414x_104] = { .wipers = 1, .max_pos = 128, .kohms = 100, },
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[MCP415x_502] = { .wipers = 1, .max_pos = 256, .kohms = 5, },
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[MCP415x_103] = { .wipers = 1, .max_pos = 256, .kohms = 10, },
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[MCP415x_503] = { .wipers = 1, .max_pos = 256, .kohms = 50, },
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[MCP415x_104] = { .wipers = 1, .max_pos = 256, .kohms = 100, },
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[MCP416x_502] = { .wipers = 1, .max_pos = 256, .kohms = 5, },
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[MCP416x_103] = { .wipers = 1, .max_pos = 256, .kohms = 10, },
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[MCP416x_503] = { .wipers = 1, .max_pos = 256, .kohms = 50, },
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[MCP416x_104] = { .wipers = 1, .max_pos = 256, .kohms = 100, },
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[MCP423x_502] = { .wipers = 2, .max_pos = 128, .kohms = 5, },
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[MCP423x_103] = { .wipers = 2, .max_pos = 128, .kohms = 10, },
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[MCP423x_503] = { .wipers = 2, .max_pos = 128, .kohms = 50, },
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[MCP423x_104] = { .wipers = 2, .max_pos = 128, .kohms = 100, },
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[MCP424x_502] = { .wipers = 2, .max_pos = 128, .kohms = 5, },
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[MCP424x_103] = { .wipers = 2, .max_pos = 128, .kohms = 10, },
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[MCP424x_503] = { .wipers = 2, .max_pos = 128, .kohms = 50, },
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[MCP424x_104] = { .wipers = 2, .max_pos = 128, .kohms = 100, },
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[MCP425x_502] = { .wipers = 2, .max_pos = 256, .kohms = 5, },
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[MCP425x_103] = { .wipers = 2, .max_pos = 256, .kohms = 10, },
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[MCP425x_503] = { .wipers = 2, .max_pos = 256, .kohms = 50, },
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[MCP425x_104] = { .wipers = 2, .max_pos = 256, .kohms = 100, },
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[MCP426x_502] = { .wipers = 2, .max_pos = 256, .kohms = 5, },
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[MCP426x_103] = { .wipers = 2, .max_pos = 256, .kohms = 10, },
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[MCP426x_503] = { .wipers = 2, .max_pos = 256, .kohms = 50, },
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[MCP426x_104] = { .wipers = 2, .max_pos = 256, .kohms = 100, },
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};
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struct mcp4131_data {
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struct spi_device *spi;
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const struct mcp4131_cfg *cfg;
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struct mutex lock;
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u8 buf[2] __aligned(IIO_DMA_MINALIGN);
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};
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#define MCP4131_CHANNEL(ch) { \
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.type = IIO_RESISTANCE, \
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.indexed = 1, \
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.output = 1, \
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.channel = (ch), \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
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}
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static const struct iio_chan_spec mcp4131_channels[] = {
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MCP4131_CHANNEL(0),
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MCP4131_CHANNEL(1),
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};
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static int mcp4131_read(struct spi_device *spi, void *buf, size_t len)
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{
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struct spi_transfer t = {
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.tx_buf = buf, /* We need to send addr, cmd and 12 bits */
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.rx_buf = buf,
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.len = len,
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};
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struct spi_message m;
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spi_message_init(&m);
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spi_message_add_tail(&t, &m);
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return spi_sync(spi, &m);
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}
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static int mcp4131_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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int err;
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struct mcp4131_data *data = iio_priv(indio_dev);
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int address = chan->channel;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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mutex_lock(&data->lock);
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data->buf[0] = (address << MCP4131_WIPER_SHIFT) | MCP4131_READ;
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data->buf[1] = 0;
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err = mcp4131_read(data->spi, data->buf, 2);
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if (err) {
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mutex_unlock(&data->lock);
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return err;
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}
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/* Error, bad address/command combination */
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if (!MCP4131_CMDERR(data->buf)) {
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mutex_unlock(&data->lock);
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return -EIO;
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}
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*val = MCP4131_RAW(data->buf);
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mutex_unlock(&data->lock);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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*val = 1000 * data->cfg->kohms;
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*val2 = data->cfg->max_pos;
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return IIO_VAL_FRACTIONAL;
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}
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return -EINVAL;
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}
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static int mcp4131_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long mask)
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{
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int err;
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struct mcp4131_data *data = iio_priv(indio_dev);
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int address = chan->channel << MCP4131_WIPER_SHIFT;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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if (val > data->cfg->max_pos || val < 0)
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return -EINVAL;
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break;
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default:
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return -EINVAL;
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}
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mutex_lock(&data->lock);
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data->buf[0] = address << MCP4131_WIPER_SHIFT;
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data->buf[0] |= MCP4131_WRITE | (val >> 8);
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data->buf[1] = val & 0xFF; /* 8 bits here */
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err = spi_write(data->spi, data->buf, 2);
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mutex_unlock(&data->lock);
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return err;
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}
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static const struct iio_info mcp4131_info = {
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.read_raw = mcp4131_read_raw,
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.write_raw = mcp4131_write_raw,
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};
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static int mcp4131_probe(struct spi_device *spi)
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{
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int err;
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struct device *dev = &spi->dev;
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unsigned long devid;
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struct mcp4131_data *data;
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struct iio_dev *indio_dev;
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indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
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if (!indio_dev)
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return -ENOMEM;
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data = iio_priv(indio_dev);
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spi_set_drvdata(spi, indio_dev);
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data->spi = spi;
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data->cfg = device_get_match_data(&spi->dev);
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if (!data->cfg) {
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devid = spi_get_device_id(spi)->driver_data;
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data->cfg = &mcp4131_cfg[devid];
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}
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mutex_init(&data->lock);
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indio_dev->info = &mcp4131_info;
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indio_dev->channels = mcp4131_channels;
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indio_dev->num_channels = data->cfg->wipers;
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indio_dev->name = spi_get_device_id(spi)->name;
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err = devm_iio_device_register(dev, indio_dev);
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if (err) {
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dev_info(&spi->dev, "Unable to register %s\n", indio_dev->name);
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return err;
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}
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return 0;
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}
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static const struct of_device_id mcp4131_dt_ids[] = {
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{ .compatible = "microchip,mcp4131-502",
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.data = &mcp4131_cfg[MCP413x_502] },
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{ .compatible = "microchip,mcp4131-103",
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.data = &mcp4131_cfg[MCP413x_103] },
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{ .compatible = "microchip,mcp4131-503",
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.data = &mcp4131_cfg[MCP413x_503] },
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{ .compatible = "microchip,mcp4131-104",
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.data = &mcp4131_cfg[MCP413x_104] },
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{ .compatible = "microchip,mcp4132-502",
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.data = &mcp4131_cfg[MCP413x_502] },
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{ .compatible = "microchip,mcp4132-103",
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.data = &mcp4131_cfg[MCP413x_103] },
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{ .compatible = "microchip,mcp4132-503",
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.data = &mcp4131_cfg[MCP413x_503] },
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{ .compatible = "microchip,mcp4132-104",
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.data = &mcp4131_cfg[MCP413x_104] },
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{ .compatible = "microchip,mcp4141-502",
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.data = &mcp4131_cfg[MCP414x_502] },
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{ .compatible = "microchip,mcp4141-103",
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.data = &mcp4131_cfg[MCP414x_103] },
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{ .compatible = "microchip,mcp4141-503",
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.data = &mcp4131_cfg[MCP414x_503] },
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{ .compatible = "microchip,mcp4141-104",
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.data = &mcp4131_cfg[MCP414x_104] },
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{ .compatible = "microchip,mcp4142-502",
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.data = &mcp4131_cfg[MCP414x_502] },
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{ .compatible = "microchip,mcp4142-103",
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.data = &mcp4131_cfg[MCP414x_103] },
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{ .compatible = "microchip,mcp4142-503",
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.data = &mcp4131_cfg[MCP414x_503] },
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{ .compatible = "microchip,mcp4142-104",
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.data = &mcp4131_cfg[MCP414x_104] },
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{ .compatible = "microchip,mcp4151-502",
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.data = &mcp4131_cfg[MCP415x_502] },
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{ .compatible = "microchip,mcp4151-103",
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.data = &mcp4131_cfg[MCP415x_103] },
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{ .compatible = "microchip,mcp4151-503",
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.data = &mcp4131_cfg[MCP415x_503] },
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{ .compatible = "microchip,mcp4151-104",
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.data = &mcp4131_cfg[MCP415x_104] },
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{ .compatible = "microchip,mcp4152-502",
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.data = &mcp4131_cfg[MCP415x_502] },
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{ .compatible = "microchip,mcp4152-103",
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.data = &mcp4131_cfg[MCP415x_103] },
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{ .compatible = "microchip,mcp4152-503",
|
||
|
|
.data = &mcp4131_cfg[MCP415x_503] },
|
||
|
|
{ .compatible = "microchip,mcp4152-104",
|
||
|
|
.data = &mcp4131_cfg[MCP415x_104] },
|
||
|
|
{ .compatible = "microchip,mcp4161-502",
|
||
|
|
.data = &mcp4131_cfg[MCP416x_502] },
|
||
|
|
{ .compatible = "microchip,mcp4161-103",
|
||
|
|
.data = &mcp4131_cfg[MCP416x_103] },
|
||
|
|
{ .compatible = "microchip,mcp4161-503",
|
||
|
|
.data = &mcp4131_cfg[MCP416x_503] },
|
||
|
|
{ .compatible = "microchip,mcp4161-104",
|
||
|
|
.data = &mcp4131_cfg[MCP416x_104] },
|
||
|
|
{ .compatible = "microchip,mcp4162-502",
|
||
|
|
.data = &mcp4131_cfg[MCP416x_502] },
|
||
|
|
{ .compatible = "microchip,mcp4162-103",
|
||
|
|
.data = &mcp4131_cfg[MCP416x_103] },
|
||
|
|
{ .compatible = "microchip,mcp4162-503",
|
||
|
|
.data = &mcp4131_cfg[MCP416x_503] },
|
||
|
|
{ .compatible = "microchip,mcp4162-104",
|
||
|
|
.data = &mcp4131_cfg[MCP416x_104] },
|
||
|
|
{ .compatible = "microchip,mcp4231-502",
|
||
|
|
.data = &mcp4131_cfg[MCP423x_502] },
|
||
|
|
{ .compatible = "microchip,mcp4231-103",
|
||
|
|
.data = &mcp4131_cfg[MCP423x_103] },
|
||
|
|
{ .compatible = "microchip,mcp4231-503",
|
||
|
|
.data = &mcp4131_cfg[MCP423x_503] },
|
||
|
|
{ .compatible = "microchip,mcp4231-104",
|
||
|
|
.data = &mcp4131_cfg[MCP423x_104] },
|
||
|
|
{ .compatible = "microchip,mcp4232-502",
|
||
|
|
.data = &mcp4131_cfg[MCP423x_502] },
|
||
|
|
{ .compatible = "microchip,mcp4232-103",
|
||
|
|
.data = &mcp4131_cfg[MCP423x_103] },
|
||
|
|
{ .compatible = "microchip,mcp4232-503",
|
||
|
|
.data = &mcp4131_cfg[MCP423x_503] },
|
||
|
|
{ .compatible = "microchip,mcp4232-104",
|
||
|
|
.data = &mcp4131_cfg[MCP423x_104] },
|
||
|
|
{ .compatible = "microchip,mcp4241-502",
|
||
|
|
.data = &mcp4131_cfg[MCP424x_502] },
|
||
|
|
{ .compatible = "microchip,mcp4241-103",
|
||
|
|
.data = &mcp4131_cfg[MCP424x_103] },
|
||
|
|
{ .compatible = "microchip,mcp4241-503",
|
||
|
|
.data = &mcp4131_cfg[MCP424x_503] },
|
||
|
|
{ .compatible = "microchip,mcp4241-104",
|
||
|
|
.data = &mcp4131_cfg[MCP424x_104] },
|
||
|
|
{ .compatible = "microchip,mcp4242-502",
|
||
|
|
.data = &mcp4131_cfg[MCP424x_502] },
|
||
|
|
{ .compatible = "microchip,mcp4242-103",
|
||
|
|
.data = &mcp4131_cfg[MCP424x_103] },
|
||
|
|
{ .compatible = "microchip,mcp4242-503",
|
||
|
|
.data = &mcp4131_cfg[MCP424x_503] },
|
||
|
|
{ .compatible = "microchip,mcp4242-104",
|
||
|
|
.data = &mcp4131_cfg[MCP424x_104] },
|
||
|
|
{ .compatible = "microchip,mcp4251-502",
|
||
|
|
.data = &mcp4131_cfg[MCP425x_502] },
|
||
|
|
{ .compatible = "microchip,mcp4251-103",
|
||
|
|
.data = &mcp4131_cfg[MCP425x_103] },
|
||
|
|
{ .compatible = "microchip,mcp4251-503",
|
||
|
|
.data = &mcp4131_cfg[MCP425x_503] },
|
||
|
|
{ .compatible = "microchip,mcp4251-104",
|
||
|
|
.data = &mcp4131_cfg[MCP425x_104] },
|
||
|
|
{ .compatible = "microchip,mcp4252-502",
|
||
|
|
.data = &mcp4131_cfg[MCP425x_502] },
|
||
|
|
{ .compatible = "microchip,mcp4252-103",
|
||
|
|
.data = &mcp4131_cfg[MCP425x_103] },
|
||
|
|
{ .compatible = "microchip,mcp4252-503",
|
||
|
|
.data = &mcp4131_cfg[MCP425x_503] },
|
||
|
|
{ .compatible = "microchip,mcp4252-104",
|
||
|
|
.data = &mcp4131_cfg[MCP425x_104] },
|
||
|
|
{ .compatible = "microchip,mcp4261-502",
|
||
|
|
.data = &mcp4131_cfg[MCP426x_502] },
|
||
|
|
{ .compatible = "microchip,mcp4261-103",
|
||
|
|
.data = &mcp4131_cfg[MCP426x_103] },
|
||
|
|
{ .compatible = "microchip,mcp4261-503",
|
||
|
|
.data = &mcp4131_cfg[MCP426x_503] },
|
||
|
|
{ .compatible = "microchip,mcp4261-104",
|
||
|
|
.data = &mcp4131_cfg[MCP426x_104] },
|
||
|
|
{ .compatible = "microchip,mcp4262-502",
|
||
|
|
.data = &mcp4131_cfg[MCP426x_502] },
|
||
|
|
{ .compatible = "microchip,mcp4262-103",
|
||
|
|
.data = &mcp4131_cfg[MCP426x_103] },
|
||
|
|
{ .compatible = "microchip,mcp4262-503",
|
||
|
|
.data = &mcp4131_cfg[MCP426x_503] },
|
||
|
|
{ .compatible = "microchip,mcp4262-104",
|
||
|
|
.data = &mcp4131_cfg[MCP426x_104] },
|
||
|
|
{}
|
||
|
|
};
|
||
|
|
MODULE_DEVICE_TABLE(of, mcp4131_dt_ids);
|
||
|
|
|
||
|
|
static const struct spi_device_id mcp4131_id[] = {
|
||
|
|
{ "mcp4131-502", MCP413x_502 },
|
||
|
|
{ "mcp4131-103", MCP413x_103 },
|
||
|
|
{ "mcp4131-503", MCP413x_503 },
|
||
|
|
{ "mcp4131-104", MCP413x_104 },
|
||
|
|
{ "mcp4132-502", MCP413x_502 },
|
||
|
|
{ "mcp4132-103", MCP413x_103 },
|
||
|
|
{ "mcp4132-503", MCP413x_503 },
|
||
|
|
{ "mcp4132-104", MCP413x_104 },
|
||
|
|
{ "mcp4141-502", MCP414x_502 },
|
||
|
|
{ "mcp4141-103", MCP414x_103 },
|
||
|
|
{ "mcp4141-503", MCP414x_503 },
|
||
|
|
{ "mcp4141-104", MCP414x_104 },
|
||
|
|
{ "mcp4142-502", MCP414x_502 },
|
||
|
|
{ "mcp4142-103", MCP414x_103 },
|
||
|
|
{ "mcp4142-503", MCP414x_503 },
|
||
|
|
{ "mcp4142-104", MCP414x_104 },
|
||
|
|
{ "mcp4151-502", MCP415x_502 },
|
||
|
|
{ "mcp4151-103", MCP415x_103 },
|
||
|
|
{ "mcp4151-503", MCP415x_503 },
|
||
|
|
{ "mcp4151-104", MCP415x_104 },
|
||
|
|
{ "mcp4152-502", MCP415x_502 },
|
||
|
|
{ "mcp4152-103", MCP415x_103 },
|
||
|
|
{ "mcp4152-503", MCP415x_503 },
|
||
|
|
{ "mcp4152-104", MCP415x_104 },
|
||
|
|
{ "mcp4161-502", MCP416x_502 },
|
||
|
|
{ "mcp4161-103", MCP416x_103 },
|
||
|
|
{ "mcp4161-503", MCP416x_503 },
|
||
|
|
{ "mcp4161-104", MCP416x_104 },
|
||
|
|
{ "mcp4162-502", MCP416x_502 },
|
||
|
|
{ "mcp4162-103", MCP416x_103 },
|
||
|
|
{ "mcp4162-503", MCP416x_503 },
|
||
|
|
{ "mcp4162-104", MCP416x_104 },
|
||
|
|
{ "mcp4231-502", MCP423x_502 },
|
||
|
|
{ "mcp4231-103", MCP423x_103 },
|
||
|
|
{ "mcp4231-503", MCP423x_503 },
|
||
|
|
{ "mcp4231-104", MCP423x_104 },
|
||
|
|
{ "mcp4232-502", MCP423x_502 },
|
||
|
|
{ "mcp4232-103", MCP423x_103 },
|
||
|
|
{ "mcp4232-503", MCP423x_503 },
|
||
|
|
{ "mcp4232-104", MCP423x_104 },
|
||
|
|
{ "mcp4241-502", MCP424x_502 },
|
||
|
|
{ "mcp4241-103", MCP424x_103 },
|
||
|
|
{ "mcp4241-503", MCP424x_503 },
|
||
|
|
{ "mcp4241-104", MCP424x_104 },
|
||
|
|
{ "mcp4242-502", MCP424x_502 },
|
||
|
|
{ "mcp4242-103", MCP424x_103 },
|
||
|
|
{ "mcp4242-503", MCP424x_503 },
|
||
|
|
{ "mcp4242-104", MCP424x_104 },
|
||
|
|
{ "mcp4251-502", MCP425x_502 },
|
||
|
|
{ "mcp4251-103", MCP425x_103 },
|
||
|
|
{ "mcp4251-503", MCP425x_503 },
|
||
|
|
{ "mcp4251-104", MCP425x_104 },
|
||
|
|
{ "mcp4252-502", MCP425x_502 },
|
||
|
|
{ "mcp4252-103", MCP425x_103 },
|
||
|
|
{ "mcp4252-503", MCP425x_503 },
|
||
|
|
{ "mcp4252-104", MCP425x_104 },
|
||
|
|
{ "mcp4261-502", MCP426x_502 },
|
||
|
|
{ "mcp4261-103", MCP426x_103 },
|
||
|
|
{ "mcp4261-503", MCP426x_503 },
|
||
|
|
{ "mcp4261-104", MCP426x_104 },
|
||
|
|
{ "mcp4262-502", MCP426x_502 },
|
||
|
|
{ "mcp4262-103", MCP426x_103 },
|
||
|
|
{ "mcp4262-503", MCP426x_503 },
|
||
|
|
{ "mcp4262-104", MCP426x_104 },
|
||
|
|
{}
|
||
|
|
};
|
||
|
|
MODULE_DEVICE_TABLE(spi, mcp4131_id);
|
||
|
|
|
||
|
|
static struct spi_driver mcp4131_driver = {
|
||
|
|
.driver = {
|
||
|
|
.name = "mcp4131",
|
||
|
|
.of_match_table = mcp4131_dt_ids,
|
||
|
|
},
|
||
|
|
.probe = mcp4131_probe,
|
||
|
|
.id_table = mcp4131_id,
|
||
|
|
};
|
||
|
|
|
||
|
|
module_spi_driver(mcp4131_driver);
|
||
|
|
|
||
|
|
MODULE_AUTHOR("Slawomir Stepien <sst@poczta.fm>");
|
||
|
|
MODULE_DESCRIPTION("MCP4131 digital potentiometer");
|
||
|
|
MODULE_LICENSE("GPL v2");
|