20 lines
596 B
Plaintext
20 lines
596 B
Plaintext
|
# SPDX-License-Identifier: GPL-2.0-only
|
||
|
|
|
||
|
|
comment "Allegro DVT media platform drivers"
|
||
|
|
|
||
|
|
config VIDEO_ALLEGRO_DVT
|
||
|
|
tristate "Allegro DVT Video IP Core"
|
||
|
|
depends on V4L_MEM2MEM_DRIVERS
|
||
|
|
depends on VIDEO_DEV
|
||
|
|
depends on ARCH_ZYNQMP || COMPILE_TEST
|
||
|
|
select V4L2_MEM2MEM_DEV
|
||
|
|
select VIDEOBUF2_DMA_CONTIG
|
||
|
|
select REGMAP_MMIO
|
||
|
|
help
|
||
|
|
Support for the encoder video IP core by Allegro DVT. This core is
|
||
|
|
found for example on the Xilinx ZynqMP SoC in the EV family and is
|
||
|
|
called VCU in the reference manual.
|
||
|
|
|
||
|
|
To compile this driver as a module, choose M here: the module
|
||
|
|
will be called allegro.
|