514 lines
12 KiB
C
514 lines
12 KiB
C
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// SPDX-License-Identifier: GPL-2.0+
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/* Microchip Sparx5 Switch driver
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*
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* Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries.
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*/
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#include <net/pkt_cls.h>
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#include "sparx5_main.h"
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#include "sparx5_qos.h"
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/* Max rates for leak groups */
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static const u32 spx5_hsch_max_group_rate[SPX5_HSCH_LEAK_GRP_CNT] = {
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1048568, /* 1.049 Gbps */
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2621420, /* 2.621 Gbps */
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10485680, /* 10.486 Gbps */
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26214200 /* 26.214 Gbps */
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};
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static struct sparx5_layer layers[SPX5_HSCH_LAYER_CNT];
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static u32 sparx5_lg_get_leak_time(struct sparx5 *sparx5, u32 layer, u32 group)
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{
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u32 value;
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value = spx5_rd(sparx5, HSCH_HSCH_TIMER_CFG(layer, group));
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return HSCH_HSCH_TIMER_CFG_LEAK_TIME_GET(value);
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}
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static void sparx5_lg_set_leak_time(struct sparx5 *sparx5, u32 layer, u32 group,
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u32 leak_time)
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{
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spx5_wr(HSCH_HSCH_TIMER_CFG_LEAK_TIME_SET(leak_time), sparx5,
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HSCH_HSCH_TIMER_CFG(layer, group));
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}
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static u32 sparx5_lg_get_first(struct sparx5 *sparx5, u32 layer, u32 group)
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{
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u32 value;
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value = spx5_rd(sparx5, HSCH_HSCH_LEAK_CFG(layer, group));
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return HSCH_HSCH_LEAK_CFG_LEAK_FIRST_GET(value);
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}
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static u32 sparx5_lg_get_next(struct sparx5 *sparx5, u32 layer, u32 group,
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u32 idx)
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{
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u32 value;
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value = spx5_rd(sparx5, HSCH_SE_CONNECT(idx));
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return HSCH_SE_CONNECT_SE_LEAK_LINK_GET(value);
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}
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static u32 sparx5_lg_get_last(struct sparx5 *sparx5, u32 layer, u32 group)
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{
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u32 itr, next;
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itr = sparx5_lg_get_first(sparx5, layer, group);
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for (;;) {
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next = sparx5_lg_get_next(sparx5, layer, group, itr);
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if (itr == next)
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return itr;
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itr = next;
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}
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}
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static bool sparx5_lg_is_last(struct sparx5 *sparx5, u32 layer, u32 group,
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u32 idx)
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{
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return idx == sparx5_lg_get_next(sparx5, layer, group, idx);
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}
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static bool sparx5_lg_is_first(struct sparx5 *sparx5, u32 layer, u32 group,
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u32 idx)
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{
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return idx == sparx5_lg_get_first(sparx5, layer, group);
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}
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static bool sparx5_lg_is_empty(struct sparx5 *sparx5, u32 layer, u32 group)
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{
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return sparx5_lg_get_leak_time(sparx5, layer, group) == 0;
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}
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static bool sparx5_lg_is_singular(struct sparx5 *sparx5, u32 layer, u32 group)
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{
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if (sparx5_lg_is_empty(sparx5, layer, group))
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return false;
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return sparx5_lg_get_first(sparx5, layer, group) ==
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sparx5_lg_get_last(sparx5, layer, group);
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}
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static void sparx5_lg_enable(struct sparx5 *sparx5, u32 layer, u32 group,
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u32 leak_time)
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{
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sparx5_lg_set_leak_time(sparx5, layer, group, leak_time);
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}
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static void sparx5_lg_disable(struct sparx5 *sparx5, u32 layer, u32 group)
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{
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sparx5_lg_set_leak_time(sparx5, layer, group, 0);
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}
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static int sparx5_lg_get_group_by_index(struct sparx5 *sparx5, u32 layer,
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u32 idx, u32 *group)
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{
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u32 itr, next;
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int i;
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for (i = 0; i < SPX5_HSCH_LEAK_GRP_CNT; i++) {
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if (sparx5_lg_is_empty(sparx5, layer, i))
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continue;
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itr = sparx5_lg_get_first(sparx5, layer, i);
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for (;;) {
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next = sparx5_lg_get_next(sparx5, layer, i, itr);
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if (itr == idx) {
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*group = i;
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return 0; /* Found it */
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}
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if (itr == next)
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break; /* Was not found */
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itr = next;
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}
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}
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return -1;
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}
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static int sparx5_lg_get_group_by_rate(u32 layer, u32 rate, u32 *group)
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{
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struct sparx5_layer *l = &layers[layer];
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struct sparx5_lg *lg;
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u32 i;
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for (i = 0; i < SPX5_HSCH_LEAK_GRP_CNT; i++) {
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lg = &l->leak_groups[i];
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if (rate <= lg->max_rate) {
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*group = i;
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return 0;
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}
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}
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return -1;
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}
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static int sparx5_lg_get_adjacent(struct sparx5 *sparx5, u32 layer, u32 group,
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u32 idx, u32 *prev, u32 *next, u32 *first)
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{
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u32 itr;
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*first = sparx5_lg_get_first(sparx5, layer, group);
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*prev = *first;
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*next = *first;
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itr = *first;
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for (;;) {
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*next = sparx5_lg_get_next(sparx5, layer, group, itr);
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if (itr == idx)
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return 0; /* Found it */
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if (itr == *next)
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return -1; /* Was not found */
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*prev = itr;
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itr = *next;
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}
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return -1;
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}
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static int sparx5_lg_conf_set(struct sparx5 *sparx5, u32 layer, u32 group,
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u32 se_first, u32 idx, u32 idx_next, bool empty)
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{
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u32 leak_time = layers[layer].leak_groups[group].leak_time;
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/* Stop leaking */
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sparx5_lg_disable(sparx5, layer, group);
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if (empty)
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return 0;
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/* Select layer */
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spx5_rmw(HSCH_HSCH_CFG_CFG_HSCH_LAYER_SET(layer),
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HSCH_HSCH_CFG_CFG_HSCH_LAYER, sparx5, HSCH_HSCH_CFG_CFG);
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/* Link elements */
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spx5_wr(HSCH_SE_CONNECT_SE_LEAK_LINK_SET(idx_next), sparx5,
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HSCH_SE_CONNECT(idx));
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/* Set the first element. */
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spx5_rmw(HSCH_HSCH_LEAK_CFG_LEAK_FIRST_SET(se_first),
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HSCH_HSCH_LEAK_CFG_LEAK_FIRST, sparx5,
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HSCH_HSCH_LEAK_CFG(layer, group));
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/* Start leaking */
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sparx5_lg_enable(sparx5, layer, group, leak_time);
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return 0;
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}
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static int sparx5_lg_del(struct sparx5 *sparx5, u32 layer, u32 group, u32 idx)
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{
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u32 first, next, prev;
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bool empty = false;
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/* idx *must* be present in the leak group */
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WARN_ON(sparx5_lg_get_adjacent(sparx5, layer, group, idx, &prev, &next,
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&first) < 0);
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if (sparx5_lg_is_singular(sparx5, layer, group)) {
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empty = true;
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} else if (sparx5_lg_is_last(sparx5, layer, group, idx)) {
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/* idx is removed, prev is now last */
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idx = prev;
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next = prev;
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} else if (sparx5_lg_is_first(sparx5, layer, group, idx)) {
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/* idx is removed and points to itself, first is next */
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first = next;
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next = idx;
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} else {
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/* Next is not touched */
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idx = prev;
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}
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return sparx5_lg_conf_set(sparx5, layer, group, first, idx, next,
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empty);
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}
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static int sparx5_lg_add(struct sparx5 *sparx5, u32 layer, u32 new_group,
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u32 idx)
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{
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u32 first, next, old_group;
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pr_debug("ADD: layer: %d, new_group: %d, idx: %d", layer, new_group,
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idx);
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/* Is this SE already shaping ? */
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if (sparx5_lg_get_group_by_index(sparx5, layer, idx, &old_group) >= 0) {
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if (old_group != new_group) {
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/* Delete from old group */
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sparx5_lg_del(sparx5, layer, old_group, idx);
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} else {
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/* Nothing to do here */
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return 0;
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}
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}
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/* We always add to head of the list */
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first = idx;
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if (sparx5_lg_is_empty(sparx5, layer, new_group))
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next = idx;
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else
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next = sparx5_lg_get_first(sparx5, layer, new_group);
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return sparx5_lg_conf_set(sparx5, layer, new_group, first, idx, next,
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false);
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}
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static int sparx5_shaper_conf_set(struct sparx5_port *port,
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const struct sparx5_shaper *sh, u32 layer,
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u32 idx, u32 group)
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{
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int (*sparx5_lg_action)(struct sparx5 *, u32, u32, u32);
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struct sparx5 *sparx5 = port->sparx5;
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if (!sh->rate && !sh->burst)
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sparx5_lg_action = &sparx5_lg_del;
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else
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sparx5_lg_action = &sparx5_lg_add;
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/* Select layer */
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spx5_rmw(HSCH_HSCH_CFG_CFG_HSCH_LAYER_SET(layer),
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HSCH_HSCH_CFG_CFG_HSCH_LAYER, sparx5, HSCH_HSCH_CFG_CFG);
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/* Set frame mode */
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spx5_rmw(HSCH_SE_CFG_SE_FRM_MODE_SET(sh->mode), HSCH_SE_CFG_SE_FRM_MODE,
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sparx5, HSCH_SE_CFG(idx));
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/* Set committed rate and burst */
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spx5_wr(HSCH_CIR_CFG_CIR_RATE_SET(sh->rate) |
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HSCH_CIR_CFG_CIR_BURST_SET(sh->burst),
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sparx5, HSCH_CIR_CFG(idx));
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/* This has to be done after the shaper configuration has been set */
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sparx5_lg_action(sparx5, layer, group, idx);
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return 0;
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}
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static u32 sparx5_weight_to_hw_cost(u32 weight_min, u32 weight)
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{
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return ((((SPX5_DWRR_COST_MAX << 4) * weight_min / weight) + 8) >> 4) -
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1;
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}
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static int sparx5_dwrr_conf_set(struct sparx5_port *port,
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struct sparx5_dwrr *dwrr)
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{
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int i;
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spx5_rmw(HSCH_HSCH_CFG_CFG_HSCH_LAYER_SET(2) |
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HSCH_HSCH_CFG_CFG_CFG_SE_IDX_SET(port->portno),
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HSCH_HSCH_CFG_CFG_HSCH_LAYER | HSCH_HSCH_CFG_CFG_CFG_SE_IDX,
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port->sparx5, HSCH_HSCH_CFG_CFG);
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/* Number of *lower* indexes that are arbitrated dwrr */
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spx5_rmw(HSCH_SE_CFG_SE_DWRR_CNT_SET(dwrr->count),
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HSCH_SE_CFG_SE_DWRR_CNT, port->sparx5,
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HSCH_SE_CFG(port->portno));
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for (i = 0; i < dwrr->count; i++) {
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spx5_rmw(HSCH_DWRR_ENTRY_DWRR_COST_SET(dwrr->cost[i]),
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HSCH_DWRR_ENTRY_DWRR_COST, port->sparx5,
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HSCH_DWRR_ENTRY(i));
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}
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return 0;
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}
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static int sparx5_leak_groups_init(struct sparx5 *sparx5)
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{
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struct sparx5_layer *layer;
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u32 sys_clk_per_100ps;
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struct sparx5_lg *lg;
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u32 leak_time_us;
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int i, ii;
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sys_clk_per_100ps = spx5_rd(sparx5, HSCH_SYS_CLK_PER);
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for (i = 0; i < SPX5_HSCH_LAYER_CNT; i++) {
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layer = &layers[i];
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for (ii = 0; ii < SPX5_HSCH_LEAK_GRP_CNT; ii++) {
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lg = &layer->leak_groups[ii];
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lg->max_rate = spx5_hsch_max_group_rate[ii];
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/* Calculate the leak time in us, to serve a maximum
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* rate of 'max_rate' for this group
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*/
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leak_time_us = (SPX5_SE_RATE_MAX * 1000) / lg->max_rate;
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/* Hardware wants leak time in ns */
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lg->leak_time = 1000 * leak_time_us;
|
||
|
|
|
||
|
|
/* Calculate resolution */
|
||
|
|
lg->resolution = 1000 / leak_time_us;
|
||
|
|
|
||
|
|
/* Maximum number of shapers that can be served by
|
||
|
|
* this leak group
|
||
|
|
*/
|
||
|
|
lg->max_ses = (1000 * leak_time_us) / sys_clk_per_100ps;
|
||
|
|
|
||
|
|
/* Example:
|
||
|
|
* Wanted bandwidth is 100Mbit:
|
||
|
|
*
|
||
|
|
* 100 mbps can be served by leak group zero.
|
||
|
|
*
|
||
|
|
* leak_time is 125000 ns.
|
||
|
|
* resolution is: 8
|
||
|
|
*
|
||
|
|
* cir = 100000 / 8 = 12500
|
||
|
|
* leaks_pr_sec = 125000 / 10^9 = 8000
|
||
|
|
* bw = 12500 * 8000 = 10^8 (100 Mbit)
|
||
|
|
*/
|
||
|
|
|
||
|
|
/* Disable by default - this also indicates an empty
|
||
|
|
* leak group
|
||
|
|
*/
|
||
|
|
sparx5_lg_disable(sparx5, i, ii);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
int sparx5_qos_init(struct sparx5 *sparx5)
|
||
|
|
{
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
ret = sparx5_leak_groups_init(sparx5);
|
||
|
|
if (ret < 0)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
int sparx5_tc_mqprio_add(struct net_device *ndev, u8 num_tc)
|
||
|
|
{
|
||
|
|
int i;
|
||
|
|
|
||
|
|
if (num_tc != SPX5_PRIOS) {
|
||
|
|
netdev_err(ndev, "Only %d traffic classes supported\n",
|
||
|
|
SPX5_PRIOS);
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
|
||
|
|
netdev_set_num_tc(ndev, num_tc);
|
||
|
|
|
||
|
|
for (i = 0; i < num_tc; i++)
|
||
|
|
netdev_set_tc_queue(ndev, i, 1, i);
|
||
|
|
|
||
|
|
netdev_dbg(ndev, "dev->num_tc %u dev->real_num_tx_queues %u\n",
|
||
|
|
ndev->num_tc, ndev->real_num_tx_queues);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
int sparx5_tc_mqprio_del(struct net_device *ndev)
|
||
|
|
{
|
||
|
|
netdev_reset_tc(ndev);
|
||
|
|
|
||
|
|
netdev_dbg(ndev, "dev->num_tc %u dev->real_num_tx_queues %u\n",
|
||
|
|
ndev->num_tc, ndev->real_num_tx_queues);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
int sparx5_tc_tbf_add(struct sparx5_port *port,
|
||
|
|
struct tc_tbf_qopt_offload_replace_params *params,
|
||
|
|
u32 layer, u32 idx)
|
||
|
|
{
|
||
|
|
struct sparx5_shaper sh = {
|
||
|
|
.mode = SPX5_SE_MODE_DATARATE,
|
||
|
|
.rate = div_u64(params->rate.rate_bytes_ps, 1000) * 8,
|
||
|
|
.burst = params->max_size,
|
||
|
|
};
|
||
|
|
struct sparx5_lg *lg;
|
||
|
|
u32 group;
|
||
|
|
|
||
|
|
/* Find suitable group for this se */
|
||
|
|
if (sparx5_lg_get_group_by_rate(layer, sh.rate, &group) < 0) {
|
||
|
|
pr_debug("Could not find leak group for se with rate: %d",
|
||
|
|
sh.rate);
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
|
||
|
|
lg = &layers[layer].leak_groups[group];
|
||
|
|
|
||
|
|
pr_debug("Found matching group (speed: %d)\n", lg->max_rate);
|
||
|
|
|
||
|
|
if (sh.rate < SPX5_SE_RATE_MIN || sh.burst < SPX5_SE_BURST_MIN)
|
||
|
|
return -EINVAL;
|
||
|
|
|
||
|
|
/* Calculate committed rate and burst */
|
||
|
|
sh.rate = DIV_ROUND_UP(sh.rate, lg->resolution);
|
||
|
|
sh.burst = DIV_ROUND_UP(sh.burst, SPX5_SE_BURST_UNIT);
|
||
|
|
|
||
|
|
if (sh.rate > SPX5_SE_RATE_MAX || sh.burst > SPX5_SE_BURST_MAX)
|
||
|
|
return -EINVAL;
|
||
|
|
|
||
|
|
return sparx5_shaper_conf_set(port, &sh, layer, idx, group);
|
||
|
|
}
|
||
|
|
|
||
|
|
int sparx5_tc_tbf_del(struct sparx5_port *port, u32 layer, u32 idx)
|
||
|
|
{
|
||
|
|
struct sparx5_shaper sh = {0};
|
||
|
|
u32 group;
|
||
|
|
|
||
|
|
sparx5_lg_get_group_by_index(port->sparx5, layer, idx, &group);
|
||
|
|
|
||
|
|
return sparx5_shaper_conf_set(port, &sh, layer, idx, group);
|
||
|
|
}
|
||
|
|
|
||
|
|
int sparx5_tc_ets_add(struct sparx5_port *port,
|
||
|
|
struct tc_ets_qopt_offload_replace_params *params)
|
||
|
|
{
|
||
|
|
struct sparx5_dwrr dwrr = {0};
|
||
|
|
/* Minimum weight for each iteration */
|
||
|
|
unsigned int w_min = 100;
|
||
|
|
int i;
|
||
|
|
|
||
|
|
/* Find minimum weight for all dwrr bands */
|
||
|
|
for (i = 0; i < SPX5_PRIOS; i++) {
|
||
|
|
if (params->quanta[i] == 0)
|
||
|
|
continue;
|
||
|
|
w_min = min(w_min, params->weights[i]);
|
||
|
|
}
|
||
|
|
|
||
|
|
for (i = 0; i < SPX5_PRIOS; i++) {
|
||
|
|
/* Strict band; skip */
|
||
|
|
if (params->quanta[i] == 0)
|
||
|
|
continue;
|
||
|
|
|
||
|
|
dwrr.count++;
|
||
|
|
|
||
|
|
/* On the sparx5, bands with higher indexes are preferred and
|
||
|
|
* arbitrated strict. Strict bands are put in the lower indexes,
|
||
|
|
* by tc, so we reverse the bands here.
|
||
|
|
*
|
||
|
|
* Also convert the weight to something the hardware
|
||
|
|
* understands.
|
||
|
|
*/
|
||
|
|
dwrr.cost[SPX5_PRIOS - i - 1] =
|
||
|
|
sparx5_weight_to_hw_cost(w_min, params->weights[i]);
|
||
|
|
}
|
||
|
|
|
||
|
|
return sparx5_dwrr_conf_set(port, &dwrr);
|
||
|
|
}
|
||
|
|
|
||
|
|
int sparx5_tc_ets_del(struct sparx5_port *port)
|
||
|
|
{
|
||
|
|
struct sparx5_dwrr dwrr = {0};
|
||
|
|
|
||
|
|
return sparx5_dwrr_conf_set(port, &dwrr);
|
||
|
|
}
|