513 lines
19 KiB
C
513 lines
19 KiB
C
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/*
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* Allwinner a33 SoCs pinctrl driver.
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*
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* Copyright (C) 2015 Vishnu Patekar <vishnupatekar0510@gmail.com>
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*
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* Based on pinctrl-sun8i-a23.c, which is:
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* Copyright (C) 2014 Chen-Yu Tsai <wens@csie.org>
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* Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include "pinctrl-sunxi.h"
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static const struct sunxi_desc_pin sun8i_a33_pins[] = {
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/* Hole */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "uart2"), /* TX */
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SUNXI_FUNCTION(0x3, "uart0"), /* TX */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 0)), /* PB_EINT0 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "uart2"), /* RX */
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SUNXI_FUNCTION(0x3, "uart0"), /* RX */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 1)), /* PB_EINT1 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 2)), /* PB_EINT2 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 3)), /* PB_EINT3 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "i2s0"), /* SYNC */
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SUNXI_FUNCTION(0x3, "aif2"), /* SYNC */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 4)), /* PB_EINT4 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "i2s0"), /* BCLK */
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SUNXI_FUNCTION(0x3, "aif2"), /* BCLK */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 5)), /* PB_EINT5 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "i2s0"), /* DOUT */
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SUNXI_FUNCTION(0x3, "aif2"), /* DOUT */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 6)), /* PB_EINT6 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "i2s0"), /* DIN */
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SUNXI_FUNCTION(0x3, "aif2"), /* DIN */
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SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 7)), /* PB_EINT7 */
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/* Hole */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "nand0"), /* WE */
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SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "nand0"), /* ALE */
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SUNXI_FUNCTION(0x3, "spi0")), /* MISO */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "nand0"), /* CLE */
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SUNXI_FUNCTION(0x3, "spi0")), /* CLK */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "nand0"), /* CE1 */
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SUNXI_FUNCTION(0x3, "spi0")), /* CS */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "nand0")), /* CE0 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "nand0"), /* RE */
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SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */
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SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "nand0")), /* RB1 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */
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SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */
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SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */
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SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */
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SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */
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SUNXI_FUNCTION(0x3, "mmc2")), /* D4 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */
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SUNXI_FUNCTION(0x3, "mmc2")), /* D5 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */
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SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */
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SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "nand0"), /* DQS */
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SUNXI_FUNCTION(0x3, "mmc2")), /* RST */
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/* Hole */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
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SUNXI_FUNCTION(0x3, "mmc1")), /* CLK */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
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SUNXI_FUNCTION(0x3, "mmc1")), /* CMD */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
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SUNXI_FUNCTION(0x3, "mmc1")), /* D0 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
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SUNXI_FUNCTION(0x3, "mmc1")), /* D1 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
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SUNXI_FUNCTION(0x3, "mmc1")), /* D2 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
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SUNXI_FUNCTION(0x3, "mmc1")), /* D3 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
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SUNXI_FUNCTION(0x3, "uart1")), /* TX */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
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SUNXI_FUNCTION(0x3, "uart1")), /* RX */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
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SUNXI_FUNCTION(0x3, "uart1")), /* RTS */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
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SUNXI_FUNCTION(0x3, "uart1")), /* CTS */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0")), /* D14 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0")), /* D15 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
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SUNXI_FUNCTION(0x3, "lvds0")), /* VP0 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
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SUNXI_FUNCTION(0x3, "lvds0")), /* VN0 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
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SUNXI_FUNCTION(0x3, "lvds0")), /* VP1 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
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SUNXI_FUNCTION(0x3, "lvds0")), /* VN1 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
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SUNXI_FUNCTION(0x3, "lvds0")), /* VP2 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
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SUNXI_FUNCTION(0x3, "lvds0")), /* VN2 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
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SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
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SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
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SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
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SUNXI_FUNCTION(0x3, "lvds0")), /* VN3 */
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/* Hole */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
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SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "csi")), /* PCLK */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "csi")), /* MCLK */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "csi")), /* HSYNC */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "csi")), /* VSYNC */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "csi")), /* D0 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "csi")), /* D1 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "csi")), /* D2 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "csi")), /* D3 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "csi")), /* D4 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "csi")), /* D5 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "csi")), /* D6 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "csi")), /* D7 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "csi"), /* SCK */
|
||
|
|
SUNXI_FUNCTION(0x3, "i2c2")), /* SCK */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "csi"), /* SDA */
|
||
|
|
SUNXI_FUNCTION(0x3, "i2c2")), /* SDA */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out")),
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out")),
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out")),
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out")),
|
||
|
|
/* Hole */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
|
||
|
|
SUNXI_FUNCTION(0x3, "jtag")), /* MS1 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
|
||
|
|
SUNXI_FUNCTION(0x3, "jtag")), /* DI1 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
|
||
|
|
SUNXI_FUNCTION(0x3, "uart0")), /* TX */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
|
||
|
|
SUNXI_FUNCTION(0x3, "jtag")), /* DO1 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
|
||
|
|
SUNXI_FUNCTION(0x3, "uart0")), /* RX */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
|
||
|
|
SUNXI_FUNCTION(0x3, "jtag")), /* CK1 */
|
||
|
|
/* Hole */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */
|
||
|
|
SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 0)), /* PG_EINT0 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */
|
||
|
|
SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 1)), /* PG_EINT1 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */
|
||
|
|
SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 2)), /* PG_EINT2 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */
|
||
|
|
SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 3)), /* PG_EINT3 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */
|
||
|
|
SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 4)), /* PG_EINT4 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */
|
||
|
|
SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 5)), /* PG_EINT5 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "uart1"), /* TX */
|
||
|
|
SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 6)), /* PG_EINT6 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "uart1"), /* RX */
|
||
|
|
SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 7)), /* PG_EINT7 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "uart1"), /* RTS */
|
||
|
|
SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 8)), /* PG_EINT8 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "uart1"), /* CTS */
|
||
|
|
SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 9)), /* PG_EINT9 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "i2s1"), /* SYNC */
|
||
|
|
SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 10)), /* PG_EINT10 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "i2s1"), /* CLK */
|
||
|
|
SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 11)), /* PG_EINT11 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "i2s1"), /* DOUT */
|
||
|
|
SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 12)), /* PG_EINT12 */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "i2s1"), /* DIN */
|
||
|
|
SUNXI_FUNCTION_IRQ_BANK(0x4, 1, 13)), /* PG_EINT13 */
|
||
|
|
/* Hole */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "pwm0")),
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "pwm1")),
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "spi0"), /* CS */
|
||
|
|
SUNXI_FUNCTION(0x3, "uart3")), /* TX */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "spi0"), /* CLK */
|
||
|
|
SUNXI_FUNCTION(0x3, "uart3")), /* RX */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "spi0"), /* DOUT */
|
||
|
|
SUNXI_FUNCTION(0x3, "uart3")), /* RTS */
|
||
|
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
|
||
|
|
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||
|
|
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||
|
|
SUNXI_FUNCTION(0x2, "spi0"), /* DIN */
|
||
|
|
SUNXI_FUNCTION(0x3, "uart3")), /* CTS */
|
||
|
|
};
|
||
|
|
|
||
|
|
static const unsigned int sun8i_a33_pinctrl_irq_bank_map[] = { 1, 2 };
|
||
|
|
|
||
|
|
static const struct sunxi_pinctrl_desc sun8i_a33_pinctrl_data = {
|
||
|
|
.pins = sun8i_a33_pins,
|
||
|
|
.npins = ARRAY_SIZE(sun8i_a33_pins),
|
||
|
|
.irq_banks = 2,
|
||
|
|
.irq_bank_map = sun8i_a33_pinctrl_irq_bank_map,
|
||
|
|
.disable_strict_mode = true,
|
||
|
|
};
|
||
|
|
|
||
|
|
static int sun8i_a33_pinctrl_probe(struct platform_device *pdev)
|
||
|
|
{
|
||
|
|
return sunxi_pinctrl_init(pdev,
|
||
|
|
&sun8i_a33_pinctrl_data);
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct of_device_id sun8i_a33_pinctrl_match[] = {
|
||
|
|
{ .compatible = "allwinner,sun8i-a33-pinctrl", },
|
||
|
|
{}
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct platform_driver sun8i_a33_pinctrl_driver = {
|
||
|
|
.probe = sun8i_a33_pinctrl_probe,
|
||
|
|
.driver = {
|
||
|
|
.name = "sun8i-a33-pinctrl",
|
||
|
|
.of_match_table = sun8i_a33_pinctrl_match,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
builtin_platform_driver(sun8i_a33_pinctrl_driver);
|