34 lines
809 B
C
34 lines
809 B
C
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2014 LSI Corporation
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*/
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#ifndef _DT_BINDINGS_CLK_AXM5516_H
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#define _DT_BINDINGS_CLK_AXM5516_H
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#define AXXIA_CLK_FAB_PLL 0
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#define AXXIA_CLK_CPU_PLL 1
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#define AXXIA_CLK_SYS_PLL 2
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#define AXXIA_CLK_SM0_PLL 3
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#define AXXIA_CLK_SM1_PLL 4
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#define AXXIA_CLK_FAB_DIV 5
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#define AXXIA_CLK_SYS_DIV 6
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#define AXXIA_CLK_NRCP_DIV 7
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#define AXXIA_CLK_CPU0_DIV 8
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#define AXXIA_CLK_CPU1_DIV 9
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#define AXXIA_CLK_CPU2_DIV 10
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#define AXXIA_CLK_CPU3_DIV 11
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#define AXXIA_CLK_PER_DIV 12
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#define AXXIA_CLK_MMC_DIV 13
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#define AXXIA_CLK_FAB 14
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#define AXXIA_CLK_SYS 15
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#define AXXIA_CLK_NRCP 16
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#define AXXIA_CLK_CPU0 17
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#define AXXIA_CLK_CPU1 18
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#define AXXIA_CLK_CPU2 19
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#define AXXIA_CLK_CPU3 20
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#define AXXIA_CLK_PER 21
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#define AXXIA_CLK_MMC 22
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#endif
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