21 lines
488 B
C
21 lines
488 B
C
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/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright (C) 2018 Renesas Electronics Corp.
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*
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*/
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#ifndef __DT_BINDINGS_CLOCK_R7S9210_CPG_MSSR_H__
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#define __DT_BINDINGS_CLOCK_R7S9210_CPG_MSSR_H__
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#include <dt-bindings/clock/renesas-cpg-mssr.h>
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/* R7S9210 CPG Core Clocks */
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#define R7S9210_CLK_I 0
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#define R7S9210_CLK_G 1
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#define R7S9210_CLK_B 2
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#define R7S9210_CLK_P1 3
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#define R7S9210_CLK_P1C 4
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#define R7S9210_CLK_P0 5
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#endif /* __DT_BINDINGS_CLOCK_R7S9210_CPG_MSSR_H__ */
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