56 lines
1.6 KiB
C
56 lines
1.6 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* ADV7343 header file
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*
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* Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
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*/
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#ifndef ADV7343_H
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#define ADV7343_H
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#define ADV7343_COMPOSITE_ID (0)
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#define ADV7343_COMPONENT_ID (1)
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#define ADV7343_SVIDEO_ID (2)
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/**
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* struct adv7343_power_mode - power mode configuration.
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* @sleep_mode: on enable the current consumption is reduced to micro ampere
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* level. All DACs and the internal PLL circuit are disabled.
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* Registers can be read from and written in sleep mode.
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* @pll_control: PLL and oversampling control. This control allows internal
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* PLL 1 circuit to be powered down and the oversampling to be
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* switched off.
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* @dac: array to configure power on/off DAC's 1..6
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*
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* Power mode register (Register 0x0), for more info refer REGISTER MAP ACCESS
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* section of datasheet[1], table 17 page no 30.
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*
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* [1] http://www.analog.com/static/imported-files/data_sheets/ADV7342_7343.pdf
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*/
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struct adv7343_power_mode {
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bool sleep_mode;
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bool pll_control;
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u32 dac[6];
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};
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/**
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* struct adv7343_sd_config - SD Only Output Configuration.
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* @sd_dac_out: array configuring SD DAC Outputs 1 and 2
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*/
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struct adv7343_sd_config {
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/* SD only Output Configuration */
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u32 sd_dac_out[2];
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};
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/**
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* struct adv7343_platform_data - Platform data values and access functions.
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* @mode_config: Configuration for power mode.
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* @sd_config: SD Only Configuration.
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*/
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struct adv7343_platform_data {
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struct adv7343_power_mode mode_config;
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struct adv7343_sd_config sd_config;
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};
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#endif /* End of #ifndef ADV7343_H */
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