99 lines
2.8 KiB
C
99 lines
2.8 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _TOOLS_LINUX_ASM_AARCH64_BARRIER_H
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#define _TOOLS_LINUX_ASM_AARCH64_BARRIER_H
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/*
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* From tools/perf/perf-sys.h, last modified in:
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* f428ebd184c82a7914b2aa7e9f868918aaf7ea78 perf tools: Fix AAAAARGH64 memory barriers
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*
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* XXX: arch/arm64/include/asm/barrier.h in the kernel sources use dsb, is this
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* a case like for arm32 where we do things differently in userspace?
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*/
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#define mb() asm volatile("dmb ish" ::: "memory")
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#define wmb() asm volatile("dmb ishst" ::: "memory")
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#define rmb() asm volatile("dmb ishld" ::: "memory")
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/*
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* Kernel uses dmb variants on arm64 for smp_*() barriers. Pretty much the same
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* implementation as above mb()/wmb()/rmb(), though for the latter kernel uses
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* dsb. In any case, should above mb()/wmb()/rmb() change, make sure the below
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* smp_*() don't.
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*/
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#define smp_mb() asm volatile("dmb ish" ::: "memory")
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#define smp_wmb() asm volatile("dmb ishst" ::: "memory")
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#define smp_rmb() asm volatile("dmb ishld" ::: "memory")
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#define smp_store_release(p, v) \
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do { \
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union { typeof(*p) __val; char __c[1]; } __u = \
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{ .__val = (v) }; \
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\
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switch (sizeof(*p)) { \
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case 1: \
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asm volatile ("stlrb %w1, %0" \
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: "=Q" (*p) \
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: "r" (*(__u8_alias_t *)__u.__c) \
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: "memory"); \
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break; \
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case 2: \
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asm volatile ("stlrh %w1, %0" \
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: "=Q" (*p) \
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: "r" (*(__u16_alias_t *)__u.__c) \
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: "memory"); \
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break; \
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case 4: \
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asm volatile ("stlr %w1, %0" \
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: "=Q" (*p) \
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: "r" (*(__u32_alias_t *)__u.__c) \
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: "memory"); \
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break; \
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case 8: \
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asm volatile ("stlr %1, %0" \
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: "=Q" (*p) \
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: "r" (*(__u64_alias_t *)__u.__c) \
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: "memory"); \
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break; \
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default: \
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/* Only to shut up gcc ... */ \
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mb(); \
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break; \
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} \
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} while (0)
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#define smp_load_acquire(p) \
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({ \
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union { typeof(*p) __val; char __c[1]; } __u = \
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{ .__c = { 0 } }; \
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\
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switch (sizeof(*p)) { \
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case 1: \
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asm volatile ("ldarb %w0, %1" \
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: "=r" (*(__u8_alias_t *)__u.__c) \
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: "Q" (*p) : "memory"); \
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break; \
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case 2: \
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asm volatile ("ldarh %w0, %1" \
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: "=r" (*(__u16_alias_t *)__u.__c) \
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: "Q" (*p) : "memory"); \
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break; \
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case 4: \
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asm volatile ("ldar %w0, %1" \
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: "=r" (*(__u32_alias_t *)__u.__c) \
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: "Q" (*p) : "memory"); \
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break; \
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case 8: \
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asm volatile ("ldar %0, %1" \
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: "=r" (*(__u64_alias_t *)__u.__c) \
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: "Q" (*p) : "memory"); \
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break; \
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default: \
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/* Only to shut up gcc ... */ \
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mb(); \
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break; \
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} \
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__u.__val; \
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})
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#endif /* _TOOLS_LINUX_ASM_AARCH64_BARRIER_H */
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