200 lines
9.8 KiB
C
200 lines
9.8 KiB
C
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/* SPDX-License-Identifier: LGPL-2.1 OR MIT */
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/*
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* AARCH64 specific definitions for NOLIBC
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* Copyright (C) 2017-2022 Willy Tarreau <w@1wt.eu>
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*/
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#ifndef _NOLIBC_ARCH_AARCH64_H
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#define _NOLIBC_ARCH_AARCH64_H
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/* O_* macros for fcntl/open are architecture-specific */
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#define O_RDONLY 0
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#define O_WRONLY 1
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#define O_RDWR 2
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#define O_CREAT 0x40
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#define O_EXCL 0x80
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#define O_NOCTTY 0x100
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#define O_TRUNC 0x200
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#define O_APPEND 0x400
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#define O_NONBLOCK 0x800
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#define O_DIRECTORY 0x4000
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/* The struct returned by the newfstatat() syscall. Differs slightly from the
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* x86_64's stat one by field ordering, so be careful.
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*/
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struct sys_stat_struct {
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unsigned long st_dev;
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unsigned long st_ino;
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unsigned int st_mode;
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unsigned int st_nlink;
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unsigned int st_uid;
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unsigned int st_gid;
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unsigned long st_rdev;
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unsigned long __pad1;
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long st_size;
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int st_blksize;
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int __pad2;
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long st_blocks;
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long st_atime;
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unsigned long st_atime_nsec;
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long st_mtime;
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unsigned long st_mtime_nsec;
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long st_ctime;
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unsigned long st_ctime_nsec;
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unsigned int __unused[2];
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};
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/* Syscalls for AARCH64 :
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* - registers are 64-bit
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* - stack is 16-byte aligned
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* - syscall number is passed in x8
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* - arguments are in x0, x1, x2, x3, x4, x5
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* - the system call is performed by calling svc 0
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* - syscall return comes in x0.
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* - the arguments are cast to long and assigned into the target registers
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* which are then simply passed as registers to the asm code, so that we
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* don't have to experience issues with register constraints.
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*
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* On aarch64, select() is not implemented so we have to use pselect6().
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*/
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#define __ARCH_WANT_SYS_PSELECT6
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#define my_syscall0(num) \
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({ \
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register long _num __asm__ ("x8") = (num); \
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register long _arg1 __asm__ ("x0"); \
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\
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__asm__ volatile ( \
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"svc #0\n" \
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: "=r"(_arg1) \
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: "r"(_num) \
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: "memory", "cc" \
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); \
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_arg1; \
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})
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#define my_syscall1(num, arg1) \
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({ \
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register long _num __asm__ ("x8") = (num); \
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register long _arg1 __asm__ ("x0") = (long)(arg1); \
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\
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__asm__ volatile ( \
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"svc #0\n" \
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: "=r"(_arg1) \
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: "r"(_arg1), \
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"r"(_num) \
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: "memory", "cc" \
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); \
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_arg1; \
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})
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#define my_syscall2(num, arg1, arg2) \
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({ \
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register long _num __asm__ ("x8") = (num); \
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register long _arg1 __asm__ ("x0") = (long)(arg1); \
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register long _arg2 __asm__ ("x1") = (long)(arg2); \
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\
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__asm__ volatile ( \
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"svc #0\n" \
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: "=r"(_arg1) \
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: "r"(_arg1), "r"(_arg2), \
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"r"(_num) \
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: "memory", "cc" \
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); \
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_arg1; \
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})
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#define my_syscall3(num, arg1, arg2, arg3) \
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({ \
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register long _num __asm__ ("x8") = (num); \
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register long _arg1 __asm__ ("x0") = (long)(arg1); \
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register long _arg2 __asm__ ("x1") = (long)(arg2); \
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register long _arg3 __asm__ ("x2") = (long)(arg3); \
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\
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__asm__ volatile ( \
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"svc #0\n" \
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: "=r"(_arg1) \
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: "r"(_arg1), "r"(_arg2), "r"(_arg3), \
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"r"(_num) \
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: "memory", "cc" \
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); \
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_arg1; \
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})
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#define my_syscall4(num, arg1, arg2, arg3, arg4) \
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({ \
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register long _num __asm__ ("x8") = (num); \
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register long _arg1 __asm__ ("x0") = (long)(arg1); \
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register long _arg2 __asm__ ("x1") = (long)(arg2); \
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register long _arg3 __asm__ ("x2") = (long)(arg3); \
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register long _arg4 __asm__ ("x3") = (long)(arg4); \
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\
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__asm__ volatile ( \
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"svc #0\n" \
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: "=r"(_arg1) \
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: "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), \
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"r"(_num) \
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: "memory", "cc" \
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); \
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_arg1; \
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})
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#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
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({ \
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register long _num __asm__ ("x8") = (num); \
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register long _arg1 __asm__ ("x0") = (long)(arg1); \
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register long _arg2 __asm__ ("x1") = (long)(arg2); \
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register long _arg3 __asm__ ("x2") = (long)(arg3); \
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register long _arg4 __asm__ ("x3") = (long)(arg4); \
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register long _arg5 __asm__ ("x4") = (long)(arg5); \
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\
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__asm__ volatile ( \
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"svc #0\n" \
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: "=r" (_arg1) \
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: "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
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"r"(_num) \
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: "memory", "cc" \
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); \
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_arg1; \
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})
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#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
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({ \
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register long _num __asm__ ("x8") = (num); \
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register long _arg1 __asm__ ("x0") = (long)(arg1); \
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register long _arg2 __asm__ ("x1") = (long)(arg2); \
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register long _arg3 __asm__ ("x2") = (long)(arg3); \
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register long _arg4 __asm__ ("x3") = (long)(arg4); \
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register long _arg5 __asm__ ("x4") = (long)(arg5); \
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register long _arg6 __asm__ ("x5") = (long)(arg6); \
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\
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__asm__ volatile ( \
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"svc #0\n" \
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: "=r" (_arg1) \
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: "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
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"r"(_arg6), "r"(_num) \
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: "memory", "cc" \
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); \
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_arg1; \
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})
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/* startup code */
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__asm__ (".section .text\n"
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".weak _start\n"
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"_start:\n"
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"ldr x0, [sp]\n" // argc (x0) was in the stack
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"add x1, sp, 8\n" // argv (x1) = sp
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"lsl x2, x0, 3\n" // envp (x2) = 8*argc ...
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"add x2, x2, 8\n" // + 8 (skip null)
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"add x2, x2, x1\n" // + argv
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"and sp, x1, -16\n" // sp must be 16-byte aligned in the callee
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"bl main\n" // main() returns the status code, we'll exit with it.
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"mov x8, 93\n" // NR_exit == 93
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"svc #0\n"
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"");
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#endif // _NOLIBC_ARCH_AARCH64_H
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