94 lines
2.1 KiB
YAML
94 lines
2.1 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP i.MX8MP HDMI blk-ctrl
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maintainers:
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- Lucas Stach <l.stach@pengutronix.de>
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description:
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The i.MX8MP HDMMI blk-ctrl is a top-level peripheral providing access to
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the NoC and ensuring proper power sequencing of the display pipeline
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peripherals located in the HDMI domain of the SoC.
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properties:
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compatible:
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items:
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- const: fsl,imx8mp-hdmi-blk-ctrl
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- const: syscon
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reg:
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maxItems: 1
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'#power-domain-cells':
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const: 1
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power-domains:
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minItems: 8
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maxItems: 8
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power-domain-names:
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items:
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- const: bus
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- const: irqsteer
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- const: lcdif
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- const: pai
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- const: pvi
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- const: trng
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- const: hdmi-tx
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- const: hdmi-tx-phy
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clocks:
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minItems: 4
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maxItems: 4
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clock-names:
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items:
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- const: apb
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- const: axi
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- const: ref_266m
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- const: ref_24m
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interconnects:
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maxItems: 3
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interconnect-names:
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items:
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- const: hrv
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- const: lcdif-hdmi
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- const: hdcp
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required:
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- compatible
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- reg
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- power-domains
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- power-domain-names
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx8mp-clock.h>
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#include <dt-bindings/power/imx8mp-power.h>
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blk-ctrl@32fc0000 {
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compatible = "fsl,imx8mp-hdmi-blk-ctrl", "syscon";
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reg = <0x32fc0000 0x23c>;
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clocks = <&clk IMX8MP_CLK_HDMI_APB>,
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<&clk IMX8MP_CLK_HDMI_ROOT>,
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<&clk IMX8MP_CLK_HDMI_REF_266M>,
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<&clk IMX8MP_CLK_HDMI_24M>;
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clock-names = "apb", "axi", "ref_266m", "ref_24m";
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power-domains = <&pgc_hdmimix>, <&pgc_hdmimix>, <&pgc_hdmimix>,
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<&pgc_hdmimix>, <&pgc_hdmimix>, <&pgc_hdmimix>,
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<&pgc_hdmimix>, <&pgc_hdmi_phy>;
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power-domain-names = "bus", "irqsteer", "lcdif", "pai", "pvi", "trng",
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"hdmi-tx", "hdmi-tx-phy";
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#power-domain-cells = <1>;
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};
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