240 lines
6.5 KiB
C
240 lines
6.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) Jernej Skrabec <jernej.skrabec@siol.net>
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*/
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#include <drm/drm_print.h>
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#include "sun8i_csc.h"
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#include "sun8i_mixer.h"
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static const u32 ccsc_base[][2] = {
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[CCSC_MIXER0_LAYOUT] = {CCSC00_OFFSET, CCSC01_OFFSET},
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[CCSC_MIXER1_LAYOUT] = {CCSC10_OFFSET, CCSC11_OFFSET},
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[CCSC_D1_MIXER0_LAYOUT] = {CCSC00_OFFSET, CCSC01_D1_OFFSET},
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};
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/*
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* Factors are in two's complement format, 10 bits for fractinal part.
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* First tree values in each line are multiplication factor and last
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* value is constant, which is added at the end.
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*/
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static const u32 yuv2rgb[2][2][12] = {
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[DRM_COLOR_YCBCR_LIMITED_RANGE] = {
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[DRM_COLOR_YCBCR_BT601] = {
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0x000004A8, 0x00000000, 0x00000662, 0xFFFC8451,
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0x000004A8, 0xFFFFFE6F, 0xFFFFFCC0, 0x00021E4D,
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0x000004A8, 0x00000811, 0x00000000, 0xFFFBACA9,
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},
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[DRM_COLOR_YCBCR_BT709] = {
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0x000004A8, 0x00000000, 0x0000072B, 0xFFFC1F99,
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0x000004A8, 0xFFFFFF26, 0xFFFFFDDF, 0x00013383,
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0x000004A8, 0x00000873, 0x00000000, 0xFFFB7BEF,
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}
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},
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[DRM_COLOR_YCBCR_FULL_RANGE] = {
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[DRM_COLOR_YCBCR_BT601] = {
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0x00000400, 0x00000000, 0x0000059B, 0xFFFD322E,
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0x00000400, 0xFFFFFEA0, 0xFFFFFD25, 0x00021DD5,
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0x00000400, 0x00000716, 0x00000000, 0xFFFC74BD,
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},
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[DRM_COLOR_YCBCR_BT709] = {
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0x00000400, 0x00000000, 0x0000064C, 0xFFFCD9B4,
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0x00000400, 0xFFFFFF41, 0xFFFFFE21, 0x00014F96,
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0x00000400, 0x0000076C, 0x00000000, 0xFFFC49EF,
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}
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},
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};
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/*
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* DE3 has a bit different CSC units. Factors are in two's complement format.
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* First three factors in a row are multiplication factors which have 17 bits
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* for fractional part. Fourth value in a row is comprised of two factors.
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* Upper 16 bits represents difference, which is subtracted from the input
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* value before multiplication and lower 16 bits represents constant, which
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* is addes at the end.
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*
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* x' = c00 * (x + d0) + c01 * (y + d1) + c02 * (z + d2) + const0
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* y' = c10 * (x + d0) + c11 * (y + d1) + c12 * (z + d2) + const1
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* z' = c20 * (x + d0) + c21 * (y + d1) + c22 * (z + d2) + const2
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*
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* Please note that above formula is true only for Blender CSC. Other DE3 CSC
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* units takes only positive value for difference. From what can be deducted
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* from BSP driver code, those units probably automatically assume that
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* difference has to be subtracted.
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*
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* Layout of factors in table:
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* c00 c01 c02 [d0 const0]
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* c10 c11 c12 [d1 const1]
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* c20 c21 c22 [d2 const2]
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*/
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static const u32 yuv2rgb_de3[2][3][12] = {
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[DRM_COLOR_YCBCR_LIMITED_RANGE] = {
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[DRM_COLOR_YCBCR_BT601] = {
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0x0002542A, 0x00000000, 0x0003312A, 0xFFC00000,
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0x0002542A, 0xFFFF376B, 0xFFFE5FC3, 0xFE000000,
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0x0002542A, 0x000408D2, 0x00000000, 0xFE000000,
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},
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[DRM_COLOR_YCBCR_BT709] = {
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0x0002542A, 0x00000000, 0x000395E2, 0xFFC00000,
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0x0002542A, 0xFFFF92D2, 0xFFFEEF27, 0xFE000000,
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0x0002542A, 0x0004398C, 0x00000000, 0xFE000000,
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},
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[DRM_COLOR_YCBCR_BT2020] = {
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0x0002542A, 0x00000000, 0x00035B7B, 0xFFC00000,
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0x0002542A, 0xFFFFA017, 0xFFFEB2FC, 0xFE000000,
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0x0002542A, 0x00044896, 0x00000000, 0xFE000000,
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}
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},
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[DRM_COLOR_YCBCR_FULL_RANGE] = {
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[DRM_COLOR_YCBCR_BT601] = {
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0x00020000, 0x00000000, 0x0002CDD2, 0x00000000,
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0x00020000, 0xFFFF4FCE, 0xFFFE925D, 0xFE000000,
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0x00020000, 0x00038B43, 0x00000000, 0xFE000000,
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},
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[DRM_COLOR_YCBCR_BT709] = {
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0x00020000, 0x00000000, 0x0003264C, 0x00000000,
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0x00020000, 0xFFFFA018, 0xFFFF1053, 0xFE000000,
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0x00020000, 0x0003B611, 0x00000000, 0xFE000000,
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},
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[DRM_COLOR_YCBCR_BT2020] = {
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0x00020000, 0x00000000, 0x0002F2FE, 0x00000000,
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0x00020000, 0xFFFFABC0, 0xFFFEDB78, 0xFE000000,
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0x00020000, 0x0003C346, 0x00000000, 0xFE000000,
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}
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},
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};
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static void sun8i_csc_set_coefficients(struct regmap *map, u32 base,
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enum sun8i_csc_mode mode,
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enum drm_color_encoding encoding,
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enum drm_color_range range)
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{
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const u32 *table;
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u32 base_reg;
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int i;
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table = yuv2rgb[range][encoding];
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switch (mode) {
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case SUN8I_CSC_MODE_YUV2RGB:
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base_reg = SUN8I_CSC_COEFF(base, 0);
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regmap_bulk_write(map, base_reg, table, 12);
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break;
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case SUN8I_CSC_MODE_YVU2RGB:
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for (i = 0; i < 12; i++) {
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if ((i & 3) == 1)
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base_reg = SUN8I_CSC_COEFF(base, i + 1);
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else if ((i & 3) == 2)
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base_reg = SUN8I_CSC_COEFF(base, i - 1);
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else
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base_reg = SUN8I_CSC_COEFF(base, i);
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regmap_write(map, base_reg, table[i]);
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}
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break;
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default:
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DRM_WARN("Wrong CSC mode specified.\n");
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return;
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}
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}
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static void sun8i_de3_ccsc_set_coefficients(struct regmap *map, int layer,
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enum sun8i_csc_mode mode,
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enum drm_color_encoding encoding,
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enum drm_color_range range)
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{
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const u32 *table;
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u32 addr;
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int i;
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table = yuv2rgb_de3[range][encoding];
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switch (mode) {
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case SUN8I_CSC_MODE_YUV2RGB:
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addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE, layer, 0);
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regmap_bulk_write(map, addr, table, 12);
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break;
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case SUN8I_CSC_MODE_YVU2RGB:
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for (i = 0; i < 12; i++) {
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if ((i & 3) == 1)
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addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE,
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layer,
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i + 1);
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else if ((i & 3) == 2)
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addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE,
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layer,
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i - 1);
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else
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addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE,
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layer, i);
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regmap_write(map, addr, table[i]);
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}
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break;
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default:
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DRM_WARN("Wrong CSC mode specified.\n");
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return;
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}
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}
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static void sun8i_csc_enable(struct regmap *map, u32 base, bool enable)
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{
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u32 val;
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if (enable)
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val = SUN8I_CSC_CTRL_EN;
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else
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val = 0;
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regmap_update_bits(map, SUN8I_CSC_CTRL(base), SUN8I_CSC_CTRL_EN, val);
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}
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static void sun8i_de3_ccsc_enable(struct regmap *map, int layer, bool enable)
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{
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u32 val, mask;
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mask = SUN50I_MIXER_BLEND_CSC_CTL_EN(layer);
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if (enable)
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val = mask;
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else
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val = 0;
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regmap_update_bits(map, SUN50I_MIXER_BLEND_CSC_CTL(DE3_BLD_BASE),
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mask, val);
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}
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void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer,
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enum sun8i_csc_mode mode,
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enum drm_color_encoding encoding,
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enum drm_color_range range)
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{
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u32 base;
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if (mixer->cfg->is_de3) {
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sun8i_de3_ccsc_set_coefficients(mixer->engine.regs, layer,
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mode, encoding, range);
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return;
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}
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base = ccsc_base[mixer->cfg->ccsc][layer];
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sun8i_csc_set_coefficients(mixer->engine.regs, base,
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mode, encoding, range);
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}
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void sun8i_csc_enable_ccsc(struct sun8i_mixer *mixer, int layer, bool enable)
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{
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u32 base;
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if (mixer->cfg->is_de3) {
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sun8i_de3_ccsc_enable(mixer->engine.regs, layer, enable);
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return;
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}
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base = ccsc_base[mixer->cfg->ccsc][layer];
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sun8i_csc_enable(mixer->engine.regs, base, enable);
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}
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