Commit Graph

  • 2a2b221b65 disas/riscv.c: Support disas for Zcm* extensions Weiwei Li 2023-05-23 17:35:35 +08:00
  • 454c220100 target/riscv: Pass RISCVCPUConfig as target_info to disassemble_info Weiwei Li 2023-05-23 17:35:34 +08:00
  • b902ff2946 target/riscv: Split RISCVCPUConfig declarations from cpu.h into cpu_cfg.h Weiwei Li 2023-05-23 17:35:33 +08:00
  • d02eb5bcde disas: Change type of disassemble_info.target_info to pointer Weiwei Li 2023-05-23 17:35:32 +08:00
  • 3594e3e584 target/riscv: smstateen knobs Mayuresh Chitale 2023-05-18 23:20:58 +05:30
  • e0b343b5fa target/riscv: Reuse tb->flags.FS Mayuresh Chitale 2023-05-18 23:20:57 +05:30
  • 9514fc72d0 target/riscv: smstateen check for fcsr Mayuresh Chitale 2023-05-18 23:20:56 +05:30
  • 30a0d77622 target/riscv: Update cur_pmmask/base when xl changes Weiwei Li 2023-05-24 09:59:33 +08:00
  • 7b945bdc0b target/riscv: Fix pointer mask transformation for vector address Weiwei Li 2023-05-24 09:59:32 +08:00
  • b9cedbf19c hw/riscv: qemu crash when NUMA nodes exceed available CPUs Yin Wang 2023-05-19 10:37:58 +08:00
  • a828ba9d46 hw/riscv/opentitan: Correct OpenTitanState parent type/size Philippe Mathieu-Daudé 2023-05-20 07:45:10 +02:00
  • 8696b74a6f hw/riscv/opentitan: Explicit machine type definition Philippe Mathieu-Daudé 2023-05-20 07:45:09 +02:00
  • 264495f948 hw/riscv/opentitan: Add TYPE_OPENTITAN_MACHINE definition Philippe Mathieu-Daudé 2023-05-20 07:45:08 +02:00
  • e0782b11bd hw/riscv/opentitan: Declare QOM types using DEFINE_TYPES() macro Philippe Mathieu-Daudé 2023-05-20 07:45:07 +02:00
  • 9b29697fef hw/riscv/opentitan: Rename machine_[class]_init() functions Philippe Mathieu-Daudé 2023-05-20 07:45:06 +02:00
  • 89fbbaddfb target/riscv: Deny access if access is partially inside the PMP entry Weiwei Li 2023-05-17 17:15:19 +08:00
  • 1b63f2fee6 target/riscv: Separate pmp_update_rule() in pmpcfg_csr_write Weiwei Li 2023-05-17 17:15:18 +08:00
  • e924074f13 target/riscv: Flush TLB only when pmpcfg/pmpaddr really changes Weiwei Li 2023-05-17 17:15:17 +08:00
  • 7c4c31f6d9 target/riscv: Flush TLB when pmpaddr is updated Weiwei Li 2023-05-17 17:15:16 +08:00
  • 2b3e127856 target/riscv: Update the next rule addr in pmpaddr_csr_write() Weiwei Li 2023-05-17 17:15:15 +08:00
  • 37e7905803 target/riscv: Flush TLB when MMWP or MML bits are changed Weiwei Li 2023-05-17 17:15:14 +08:00
  • 97ec5aef08 target/riscv: Remove unused paramters in pmp_hart_has_privs_default() Weiwei Li 2023-05-17 17:15:13 +08:00
  • b84ffd6e74 target/riscv: Make RLB/MML/MMWP bits writable only when Smepmp is enabled Weiwei Li 2023-05-17 17:15:12 +08:00
  • e9c39713ea target/riscv: Change the return type of pmp_hart_has_privs() to bool Weiwei Li 2023-05-17 17:15:11 +08:00
  • 093ce837e1 target/riscv: Make the short cut really work in pmp_hart_has_privs Weiwei Li 2023-05-17 17:15:10 +08:00
  • bfc7ee1224 target/riscv: Move pmp_get_tlb_size apart from get_physical_address_pmp Weiwei Li 2023-05-17 17:15:09 +08:00
  • dc7b599332 target/riscv: Update pmp_get_tlb_size() Weiwei Li 2023-05-17 17:15:08 +08:00
  • faf3b5d86f target/riscv: rework write_misa() Daniel Henrique Barboza 2023-05-17 10:57:14 -03:00
  • 7f0bdfb5bf target/riscv/cpu.c: remove cfg setup from riscv_cpu_init() Daniel Henrique Barboza 2023-05-17 10:57:13 -03:00
  • e2fa85f42f target/riscv/cpu.c: validate extensions before riscv_timer_init() Daniel Henrique Barboza 2023-05-17 10:57:12 -03:00
  • f5664064cc target/riscv/cpu.c: add riscv_cpu_validate_misa_mxl() Daniel Henrique Barboza 2023-05-17 10:57:11 -03:00
  • bd30559568 target/riscv/cpu.c: add priv_spec validate/disable_exts helpers Daniel Henrique Barboza 2023-05-17 10:57:10 -03:00
  • d33e39f995 target/riscv: Update check for Zca/Zcf/Zcd Weiwei Li 2023-05-17 10:57:09 -03:00
  • 61a33ea95a target/riscv: Mask the implicitly enabled extensions in isa_string based on priv version Weiwei Li 2023-05-17 10:57:08 -03:00
  • b9a2b98e17 target/riscv: add PRIV_VERSION_LATEST Daniel Henrique Barboza 2023-05-17 10:57:07 -03:00
  • 8c6eeb508a target/riscv/cpu.c: remove set_priv_version() Daniel Henrique Barboza 2023-05-17 10:57:06 -03:00
  • 2238c9d196 target/riscv/cpu.c: remove set_vext_version() Daniel Henrique Barboza 2023-05-17 10:57:05 -03:00
  • d63be18490 target/riscv/cpu.c: add riscv_cpu_validate_v() Daniel Henrique Barboza 2023-05-17 10:57:04 -03:00
  • 6672e29d3b target/riscv: Move zc* out of the experimental properties Weiwei Li 2023-05-10 11:00:40 +08:00
  • bc0ec52eb2 target/riscv/vector_helper.c: skip set tail when vta is zero Daniel Henrique Barboza 2023-04-27 17:57:07 -03:00
  • 8e3d880484 add standalone debugging config Alwin Berger 2023-05-27 13:24:18 +02:00
  • 33d5a6dc4b re-introduce native breakpoints Alwin Berger 2023-03-13 14:46:09 +01:00
  • 4c41588596 fuzz multiple interrupts Alwin Berger 2023-03-02 15:32:24 +01:00
  • 46b6a705d5 add interrupt injection Alwin Berger 2023-01-03 20:09:54 +01:00
  • 7173dfbbd1 add jmp instrumentation Alwin Berger 2022-12-19 13:11:40 +01:00
  • fdd0df5340 Merge tag 'pull-ppc-20230610' of https://gitlab.com/danielhb/qemu into staging Richard Henderson 2023-06-10 07:25:00 -07:00
  • 374db3c821 Merge tag 'trivial-patches-20230610' of https://gitlab.com/mjt0k/qemu into staging Richard Henderson 2023-06-10 07:22:26 -07:00
  • 9ec08f3569 hw/ppc/Kconfig: MAC_NEWWORLD should always select USB_OHCI_PCI Thomas Huth 2023-05-30 12:20:41 +02:00
  • 8a15ccee4d target/ppc: Implement gathering irq statistics BALATON Zoltan 2023-06-07 00:02:00 +02:00
  • 12cae32fe1 tests/avocado/tuxrun_baselines: Fix ppc64 tests for binaries without slirp Thomas Huth 2023-06-06 21:28:02 +02:00
  • 8e67403a2c hw/ppc/openpic: Do not open-code ROUND_UP() macro Philippe Mathieu-Daudé 2023-05-23 08:15:46 +02:00
  • 17dd1354c1 target/ppc: Decrementer fix BookE semantics Nicholas Piggin 2023-05-30 23:12:13 +10:00
  • 09d2db9f46 target/ppc: Fix decrementer time underflow and infinite timer loop Nicholas Piggin 2023-05-30 23:12:12 +10:00
  • 21ee07e773 target/ppc: Rework store conditional to avoid branch Nicholas Piggin 2023-06-05 12:54:45 +10:00
  • 2c901dca18 target/ppc: Remove larx/stcx. memory barrier semantics Nicholas Piggin 2023-06-05 12:54:44 +10:00
  • 392d328abe target/ppc: Ensure stcx size matches larx Nicholas Piggin 2023-06-05 12:54:43 +10:00
  • e025e8f5a8 target/ppc: Fix lqarx to set cpu_reserve Nicholas Piggin 2023-06-05 12:54:42 +10:00
  • a5436bc6ed target/ppc: Eliminate goto in mmubooke_check_tlb() BALATON Zoltan 2023-05-30 15:28:13 +02:00
  • 2b23daa8eb target/ppc: Change ppcemb_tlb_check() to return bool BALATON Zoltan 2023-05-30 15:28:12 +02:00
  • bb60364c20 target/ppc: Simplify ppcemb_tlb_search() BALATON Zoltan 2023-05-30 15:28:11 +02:00
  • a1fa47fad1 target/ppc: Remove some unneded line breaks BALATON Zoltan 2023-05-30 15:28:10 +02:00
  • 753441c889 target/ppc: Move ppcemb_tlb_search() to mmu_common.c BALATON Zoltan 2023-05-30 15:28:09 +02:00
  • 62860c5fea target/ppc: Remove "ext" parameter of ppcemb_tlb_check() BALATON Zoltan 2023-05-30 15:28:08 +02:00
  • 728fbfb57b target/ppc: Remove single use function BALATON Zoltan 2023-05-30 15:28:07 +02:00
  • c29b070418 target/ppc: PMU implement PERFM interrupts Nicholas Piggin 2023-05-30 23:43:13 +10:00
  • fd7abfab66 target/ppc: Support directed privileged doorbell interrupt (SDOOR) Nicholas Piggin 2023-05-30 23:05:26 +10:00
  • 2e9855555e target/ppc: Fix msgclrp interrupt type Nicholas Piggin 2023-05-30 23:07:14 +10:00
  • 82ce3d5614 target/ppc: PMU do not clear MMCR0[FCECE] on performance monitor alert Nicholas Piggin 2023-05-30 23:43:12 +10:00
  • 6494d2c1fd target/ppc: Fix PMU hflags calculation Nicholas Piggin 2023-05-30 23:04:47 +10:00
  • 34b4313070 pnv/xive2: Quiet down some error messages Frederic Barrat 2023-05-31 17:05:37 +02:00
  • 6c242e79b8 target/ppc: Fix nested-hv HEAI delivery Nicholas Piggin 2023-05-30 23:21:27 +10:00
  • 6f2cbd133d pnv/xive2: Handle TIMA access through all ports Frederic Barrat 2023-06-01 14:13:31 +02:00
  • afca92071f pnv/xive2: Introduce macros to manipulate TIMA addresses Frederic Barrat 2023-06-01 14:13:30 +02:00
  • f0fc1c29a8 pnv/xive2: Allow writes to the Physical Thread Enable registers Frederic Barrat 2023-06-01 14:13:29 +02:00
  • 32af01f83a pnv/xive2: Add definition for the ESB cache configuration register Frederic Barrat 2023-06-01 14:13:28 +02:00
  • cce84fc919 pnv/xive2: Add definition for TCTXT Config register Frederic Barrat 2023-06-01 14:13:27 +02:00
  • e928907105 linux-user: elfload: Specify -R is an option for qemu-user binaries Andrew Jeffery 2023-03-27 22:25:24 +10:30
  • f101c25cd6 linux-user: elfload: s/min_mmap_addr/mmap_min_addr/ Andrew Jeffery 2023-03-27 22:25:23 +10:30
  • bdfca8a22f vnc: move assert in vnc_worker_thread_loop Anastasia Belova 2023-06-09 12:23:06 +03:00
  • 8fbf89a966 linux-user: Return EINVAL for getgroups() with negative gidsetsize Peter Maydell 2023-06-09 17:29:15 +01:00
  • 725160fe56 linux-user: add comments for TARGET_NR_[gs]etgroups{,32} Michael Tokarev 2023-06-03 20:23:38 +03:00
  • 4c030dd00f hw/usb/hcd-ehci-pci: Simplify using DEVICE_GET_CLASS() macro Philippe Mathieu-Daudé 2023-05-23 08:12:07 +02:00
  • 271233f21f hw/pci/pci: Simplify pci_bar_address() using MACHINE_GET_CLASS() macro Philippe Mathieu-Daudé 2023-05-23 08:12:06 +02:00
  • a5c80ab847 hw/i386/microvm: Simplify using object_dynamic_cast() Philippe Mathieu-Daudé 2023-05-23 08:12:05 +02:00
  • bec552e2cd hw/core/cpu: Simplify realize() using MACHINE_GET_CLASS() macro Philippe Mathieu-Daudé 2023-05-23 08:12:04 +02:00
  • d8ca9712f5 target/m68k/fpu_helper: Use FloatRelation enum to hold comparison result Philippe Mathieu-Daudé 2023-03-21 10:49:50 +01:00
  • 890e37e27c meson: install keyboard maps only if necessary Carlos Santos 2023-03-27 14:21:47 -03:00
  • fbdffb08df block.c: add newline for "Detected format" warning Michael Tokarev 2023-04-05 16:34:04 +03:00
  • 5fb9e82955 hw/remote: Fix vfu_cfg trace offset format Mattias Nissler 2023-04-26 09:35:18 +00:00
  • 40b89515d0 spelling: information Michael Tokarev 2023-04-20 22:55:41 +03:00
  • 46e75a77a9 hw/virtio/virtio-qmp.c: spelling: suppoted Michael Tokarev 2023-04-01 11:51:40 +03:00
  • 9c36407a44 docs: Fix trivial typos in vhost-user.rst Milan Zamazal 2023-05-31 14:48:31 +02:00
  • 3673ad3896 tcg/tci: Fix MemOpIdx operand index for 3-operand memops Richard Henderson 2023-06-08 09:29:25 -07:00
  • 1026223c47 Merge tag 'pull-maintainers-20230608' of https://gitlab.com/jraman/qemu into staging Richard Henderson 2023-06-09 08:30:00 -07:00
  • c45309f7a4
    maintainers: update maintainers list for vfio-user & multi-process QEMU Jagannathan Raman 2023-06-07 11:52:12 -04:00
  • 5f9dd6a8ce Merge tag 'pull-9p-20230608' of https://github.com/cschoenebeck/qemu into staging Richard Henderson 2023-06-08 08:47:35 -07:00
  • f6b0de53fb 9pfs: prevent opening special files (CVE-2023-2861) Christian Schoenebeck 2023-06-07 18:29:33 +02:00
  • 45ae97993a Merge tag 'pull-tricore-20230607' of https://github.com/bkoppelmann/qemu into staging Richard Henderson 2023-06-07 11:45:22 -07:00
  • 62cfa77fdf Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging Richard Henderson 2023-06-07 11:43:03 -07:00
  • 4f65e89f8c Merge tag 'pull-xen-20230607' of https://xenbits.xen.org/git-http/people/aperard/qemu-dm into staging Richard Henderson 2023-06-07 10:06:11 -07:00