 d8a57715bb
			
		
	
	
		d8a57715bb
		
	
	
	
	
		
			
			Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
		
			
				
	
	
		
			85 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			85 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * BCM2838 peripherals emulation
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|  *
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|  * Copyright (C) 2022 Ovchinnikov Vitalii <vitalii.ovchinnikov@auriga.com>
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|  *
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|  * SPDX-License-Identifier: GPL-2.0-or-later
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|  */
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| 
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| #ifndef BCM2838_PERIPHERALS_H
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| #define BCM2838_PERIPHERALS_H
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| 
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| #include "hw/arm/bcm2835_peripherals.h"
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| #include "hw/sd/sdhci.h"
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| #include "hw/gpio/bcm2838_gpio.h"
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| 
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| /* SPI */
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| #define GIC_SPI_INTERRUPT_MBOX         33
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| #define GIC_SPI_INTERRUPT_MPHI         40
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| #define GIC_SPI_INTERRUPT_DWC2         73
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| #define GIC_SPI_INTERRUPT_DMA_0        80
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| #define GIC_SPI_INTERRUPT_DMA_6        86
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| #define GIC_SPI_INTERRUPT_DMA_7_8      87
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| #define GIC_SPI_INTERRUPT_DMA_9_10     88
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| #define GIC_SPI_INTERRUPT_AUX_UART1    93
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| #define GIC_SPI_INTERRUPT_SDHOST       120
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| #define GIC_SPI_INTERRUPT_UART0        121
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| #define GIC_SPI_INTERRUPT_RNG200       125
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| #define GIC_SPI_INTERRUPT_EMMC_EMMC2   126
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| #define GIC_SPI_INTERRUPT_PCI_INT_A    143
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| #define GIC_SPI_INTERRUPT_GENET_A      157
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| #define GIC_SPI_INTERRUPT_GENET_B      158
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| 
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| 
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| /* GPU (legacy) DMA interrupts */
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| #define GPU_INTERRUPT_DMA0      16
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| #define GPU_INTERRUPT_DMA1      17
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| #define GPU_INTERRUPT_DMA2      18
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| #define GPU_INTERRUPT_DMA3      19
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| #define GPU_INTERRUPT_DMA4      20
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| #define GPU_INTERRUPT_DMA5      21
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| #define GPU_INTERRUPT_DMA6      22
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| #define GPU_INTERRUPT_DMA7_8    23
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| #define GPU_INTERRUPT_DMA9_10   24
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| #define GPU_INTERRUPT_DMA11     25
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| #define GPU_INTERRUPT_DMA12     26
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| #define GPU_INTERRUPT_DMA13     27
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| #define GPU_INTERRUPT_DMA14     28
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| #define GPU_INTERRUPT_DMA15     31
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| 
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| #define BCM2838_MPHI_OFFSET     0xb200
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| #define BCM2838_MPHI_SIZE       0x200
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| 
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| #define TYPE_BCM2838_PERIPHERALS "bcm2838-peripherals"
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| OBJECT_DECLARE_TYPE(BCM2838PeripheralState, BCM2838PeripheralClass,
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|                     BCM2838_PERIPHERALS)
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| 
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| struct BCM2838PeripheralState {
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|     /*< private >*/
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|     BCMSocPeripheralBaseState parent_obj;
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| 
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|     /*< public >*/
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|     MemoryRegion peri_low_mr;
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|     MemoryRegion peri_low_mr_alias;
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|     MemoryRegion mphi_mr_alias;
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| 
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|     SDHCIState emmc2;
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|     BCM2838GpioState gpio;
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| 
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|     OrIRQState mmc_irq_orgate;
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|     OrIRQState dma_7_8_irq_orgate;
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|     OrIRQState dma_9_10_irq_orgate;
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| 
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|     UnimplementedDeviceState asb;
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|     UnimplementedDeviceState clkisp;
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| };
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| 
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| struct BCM2838PeripheralClass {
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|     /*< private >*/
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|     BCMSocPeripheralBaseClass parent_class;
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|     /*< public >*/
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|     uint64_t peri_low_size; /* Peripheral lower range size */
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| };
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| 
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| #endif /* BCM2838_PERIPHERALS_H */
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