 1c38129de8
			
		
	
	
		1c38129de8
		
	
	
	
	
		
			
			Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20240305210444.310665-3-ines.varhol@telecom-paris.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
		
			
				
	
	
		
			72 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			72 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * STM32L4x5 GPIO (General Purpose Input/Ouput)
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|  *
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|  * Copyright (c) 2024 Arnaud Minier <arnaud.minier@telecom-paris.fr>
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|  * Copyright (c) 2024 Inès Varhol <ines.varhol@telecom-paris.fr>
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|  *
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|  * SPDX-License-Identifier: GPL-2.0-or-later
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|  *
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|  * This work is licensed under the terms of the GNU GPL, version 2 or later.
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|  * See the COPYING file in the top-level directory.
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|  */
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| 
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| /*
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|  * The reference used is the STMicroElectronics RM0351 Reference manual
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|  * for STM32L4x5 and STM32L4x6 advanced Arm ® -based 32-bit MCUs.
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|  * https://www.st.com/en/microcontrollers-microprocessors/stm32l4x5/documentation.html
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|  */
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| 
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| #ifndef HW_STM32L4X5_GPIO_H
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| #define HW_STM32L4X5_GPIO_H
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| 
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| #include "hw/sysbus.h"
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| #include "qom/object.h"
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| 
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| #define TYPE_STM32L4X5_GPIO "stm32l4x5-gpio"
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| OBJECT_DECLARE_SIMPLE_TYPE(Stm32l4x5GpioState, STM32L4X5_GPIO)
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| 
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| #define NUM_GPIOS 8
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| #define GPIO_NUM_PINS 16
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| 
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| struct Stm32l4x5GpioState {
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|     SysBusDevice parent_obj;
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| 
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|     MemoryRegion mmio;
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| 
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|     /* GPIO registers */
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|     uint32_t moder;
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|     uint32_t otyper;
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|     uint32_t ospeedr;
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|     uint32_t pupdr;
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|     uint32_t idr;
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|     uint32_t odr;
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|     uint32_t lckr;
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|     uint32_t afrl;
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|     uint32_t afrh;
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|     uint32_t ascr;
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| 
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|     /* GPIO registers reset values */
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|     uint32_t moder_reset;
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|     uint32_t ospeedr_reset;
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|     uint32_t pupdr_reset;
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| 
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|     /*
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|      * External driving of pins.
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|      * The pins can be set externally through the device
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|      * anonymous input GPIOs lines under certain conditions.
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|      * The pin must not be in push-pull output mode,
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|      * and can't be set high in open-drain mode.
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|      * Pins driven externally and configured to
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|      * output mode will in general be "disconnected"
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|      * (see `get_gpio_pinmask_to_disconnect()`)
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|      */
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|     uint16_t disconnected_pins;
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|     uint16_t pins_connected_high;
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| 
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|     char *name;
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|     Clock *clk;
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|     qemu_irq pin[GPIO_NUM_PINS];
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| };
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| 
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| #endif
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