Eric Auger cc27ed81cf hw/arm/smmuv3: IOTLB emulation
We emulate a TLB cache of size SMMU_IOTLB_MAX_SIZE=256.
It is implemented as a hash table whose key is a combination
of the 16b asid and 48b IOVA (Jenkins hash).

Entries are invalidated on TLB invalidation commands, either
globally, or per asid, or per asid/iova.

Signed-off-by: Eric Auger <eric.auger@redhat.com>
Message-id: 1529653501-15358-4-git-send-email-eric.auger@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-26 17:50:42 +01:00
..
2016-10-04 13:28:07 +01:00
2018-06-26 17:50:42 +01:00
2017-01-27 18:07:59 +01:00
2016-05-18 15:04:27 +03:00
2013-04-08 18:13:10 +02:00
2018-02-09 05:05:11 +01:00
2018-05-23 03:14:40 +03:00
2018-02-09 05:05:11 +01:00
2018-06-04 10:15:16 +01:00
2018-02-09 05:05:11 +01:00
2017-01-27 18:07:59 +01:00
2018-06-01 14:15:10 +02:00
2017-06-01 18:49:22 +02:00
2013-04-08 18:13:10 +02:00